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System to detect and identify errors in control information, read data and/or write data

  • US 7,836,378 B2
  • Filed: 02/21/2008
  • Issued: 11/16/2010
  • Est. Priority Date: 05/18/2006
  • Status: Active Grant
First Claim
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1. A memory device, comprising:

  • device-resident error management circuitry to generate an error management code for each write transaction;

    device-resident error management circuitry to generate an error management code for each read transaction; and

    transmission circuitry to output information representing the error management codes for each write transaction and the error management codes for each read transaction to a remote controller for comparison with stored error management codes.

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