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Soft errors handling in EEPROM devices

  • US 7,839,685 B2
  • Filed: 10/01/2009
  • Issued: 11/23/2010
  • Est. Priority Date: 05/20/1992
  • Status: Expired due to Fees
First Claim
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1. A method of operating a memory system, the memory system including an array of non-volatile memory cells, read and write circuitry connectable to the array, ECC logic, and buffer memory, the method comprising:

  • writing a set of data and corresponding ECC data by the write circuitry to a plurality of the memory cells;

    subsequently performing a read operation of the plurality of the memory cells by the read circuitry using normal read values for distinguishing between the data states;

    transferring the result of the read operation to the buffer memory;

    using the ECC logic to determine whether the result of the read operation has an uncorrectable amount of error; and

    in response to determining that the result of the read operation has an uncorrectable amount of error, performing a read operation of the plurality of the memory cells by the read circuitry using shifted read values for distinguishing between the data states.

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