System and method for a fast, programmable packet processing system
First Claim
1. A method within a processing system to utilize a graphics processing unit (GPU) as a coprocessor for a central processing unit (CPU), the method comprising:
- instructing initialization of an operations database in a memory of the GPU;
offloading operations from the CPU to the GPU, wherein the GPU is initialized with a route lookup database, wherein the route lookup database is used to resolve a longest prefix match operation;
wherein the CPU transfers a plurality of network packets into the GPU memory;
sending an instruction from the CPU to the GPU to begin processing data from the plurality of network packets on a plurality of processing nodes of the GPU using the operations database, wherein each node will extract either a source or a destination internet protocol address from a packet header for the longest prefix match operation; and
receiving results by the CPU of the processing.
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Abstract
The present invention provides a cost effective method to improve the performance of communication appliances by retargeting the graphics processing unit as a coprocessor to accelerate networking operations. A system and method is disclosed for using a coprocessor on a standard personal computer to accelerate packet processing operations common to network appliances. The appliances include but are not limited to routers, switches, load balancers and Unified Threat Management appliances. More specifically, the method uses common advanced graphics processor engines to accelerate the packet processing tasks.
33 Citations
8 Claims
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1. A method within a processing system to utilize a graphics processing unit (GPU) as a coprocessor for a central processing unit (CPU), the method comprising:
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instructing initialization of an operations database in a memory of the GPU; offloading operations from the CPU to the GPU, wherein the GPU is initialized with a route lookup database, wherein the route lookup database is used to resolve a longest prefix match operation;
wherein the CPU transfers a plurality of network packets into the GPU memory;sending an instruction from the CPU to the GPU to begin processing data from the plurality of network packets on a plurality of processing nodes of the GPU using the operations database, wherein each node will extract either a source or a destination internet protocol address from a packet header for the longest prefix match operation; and receiving results by the CPU of the processing. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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Specification