Method for debugging reconfigurable architectures

• US 7,840,842 B2
• Filed: 08/03/2007
• Issued: 11/23/2010
• Est. Priority Date: 09/03/2001
• Status: Expired due to Fees

• Current Assignee: Scientia Sol Mentis AG (PACT XPP Schweiz AG)
• Original Assignee: Maren Krass, Thomas Richter
• Inventors: Vorbach, Martin, Nückel, Armin, May, Frank
• Primary Examiner(s): LE, DIEU MINH T
• Application Number:
  US11/890,094
• Publication Number:
  US 20090006895A1
• Time in Patent Office: 1,208 Days
• Field of Search: 714/25, 714/30, 714/31, 714/33, 714/38, 714/39, 714/733, 714/734, 714/725, 712/227, 713/100
• US Class Current: 714/25
• CPC Class Codes: G06F 11/26 Functional testing
• CPC Class Codes: G06F 11/267 Reconfiguring circuits for testing, e.g. LSSD, partitioning
• CPC Class Codes: G06F 11/3656 using a specific debug interface
• CPC Class Codes: G06F 15/7867 with reconfigurable architecture
• CPC Class Codes: G06F 9/30036 Instructions to perform operations on packed data, e.g. vector, tile or matrix operations

Abstract

A method is described for debugging reconfigurable hardware. In one example embodiment, debugging information is written for each configuration cycle into a memory which is then evaluated by a debugger.

Claims

1. A method for debugging a program that defines a plurality of configurations for reconfigurable hardware, comprising:

for each of at least some of the configurations forming part of the program to be debugged;

executing the configuration on the reconfigurable hardware;

writing debugging information from the reconfigurable hardware into a memory;

reading, by a debugger, the debugging information from the memory; and

evaluating the debugging information.

2. The method according to claim 1, wherein the hardware is reconfigurable with respect to at least one of a function and a networking configuration.

3. The method according to claim 2, wherein, for each of the at least some of the configurations, the execution of the configuration causes a configuration of the hardware with respect to the at least one the function and the networking configuration.

4. The method of claim 3, wherein the debugging information includes state information of a first of the at least some of the configurations used for a second of the at least some of the configurations.

5. The method of claim 2, wherein the memory is a random access memory (RAM).

6. A method for efficiently debugging a program defining a plurality of configurations to be successively processed on a dynamically reconfigurable architecture including a plurality of logic elements cooperating with each other, the method comprising:

storing data in a memory in a configuration-conforming manner, the data generated by executing a configuration forming part of the program on the reconfigurable architecture, and including algorithmically relevant state data of the program that is associated with at least one of the configurations;

subsequently continuing execution of the program, the execution including a reconfiguration; and

detecting an error based on stored state data.

7. The method according to claim 6, wherein the memory includes an internal memory of the dynamically reconfigurable architecture in which the state data is stored.

8. The method according to claim 6, wherein for each state for which corresponding state data is to be stored, the state remains unchanged at least until the corresponding state data is stored.

9. The method according to claim 6, wherein the data are stored in an external memory and the state data relate to a state of the reconfigurable architecture after linking of operands.

10. The method according to claim 6, wherein the data includes state data that is associated with a configuration processed when the data is stored and that is not required following termination of the configuration.

11. The method according to claim 10, wherein the data further includes state data that is association with the configuration processed when the data is stored and that is required following termination of the configuration for a subsequent configuration.

12. The method according to claim 6, wherein debugging information is read out by a dedicated debug configuration, and normal program execution continues subsequent to the reading out of the debugging information.

13. A method for debugging a program that defines a plurality of configurations for reconfigurable hardware, comprising:

for at least one of the configurations forming part of the program to be debugged;

executing the configuration on the reconfigurable hardware;

writing debugging information from the reconfigurable hardware into a memory;

reading, by a debugger, the debugging information from the memory; and

evaluating the debugging information.