Manufacturing method of wiring substrate and manufacturing method of semiconductor device

• US 7,841,076 B2
• Filed: 03/27/2007
• Issued: 11/30/2010
• Est. Priority Date: 03/29/2006
• Status: Active Grant

• Current Assignee: Shinko Electric Industries Company Limited (Fujitsu Limited)
• Original Assignee: Shinko Electric Industries Company Limited (Fujitsu Limited)
• Inventors: Fujii, Tomoharu
• Primary Examiner(s): TRINH, MINH N
• Application Number:
  US11/727,547
• Publication Number:
  US 20070231962A1
• Time in Patent Office: 1,344 Days
• Field of Search: 296/00, 296/01, 29830-834, 29846-847, 295/921, 29594-595, 174/255, 174/264, 343/700.MS, 343/754, 343724-729, 343/702, 343/895, 340/572.1, 257/700, 257/754, 257/778
• US Class Current: 29/832
• CPC Class Codes: H01L 2223/6677 for antenna, e.g. antenna included within housing of semiconductor device
• CPC Class Codes: H01L 2224/05571 the external layer being disposed in a recess of the surface
• CPC Class Codes: H01L 2224/05573 Single external layer
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/16227 the bump connector connecting to a bond pad of the item
• CPC Class Codes: H01L 23/142 Metallic substrates having insulating layers
• CPC Class Codes: H01L 23/49822 Multilayer substrates multilayer metallisation on monolayer substrate H01L23/498
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/15321 being a ball array, e.g. BGA
• CPC Class Codes: H01Q 1/2283 mounted in or on the surface of a semiconductor substrate as a chip-type antenna or integrated with other components into an IC package
• CPC Class Codes: H01Q 13/106 Microstrip slot antennas patch antenna elements H01Q9/0407
• CPC Class Codes: H01Q 9/0407 Substantially flat resonant element parallel to ground plane, e.g. patch antenna dipole H01Q9/285; monopole H01Q9/40
• CPC Class Codes: H05K 1/056 the metal substrate being covered by an organic insulating layer
• CPC Class Codes: H05K 1/16 incorporating printed electric components, e.g. printed resistor, capacitor, inductor
• CPC Class Codes: H05K 2203/0152 Temporary metallic carrier, e.g. for transferring material
• CPC Class Codes: H05K 3/007 Manufacture or processing of a substrate for a printed circuit board supported by a temporary or sacrificial carrier H05K1/187, H05K3/20 and H05K3/4682 take precedence
• CPC Class Codes: H05K 3/4644 by building the multilayer layer by layer, i.e. build-up multilayer circuits making via holes in the insulating layers H05K3/0011; special circuit boards as base or core whereon the multilayer is built H05K3/4602
• CPC Class Codes: Y10T 29/49002 Electrical device making
• CPC Class Codes: Y10T 29/49016 Antenna or wave energy "plumbing" making
• CPC Class Codes: Y10T 29/4913 : Assembling to base an electrical component, e.g., capacitor, etc.

Abstract

A multilayer wiring structural body 13 is formed on a surface 57A of a metal plate 57 used as a support plate in the case of forming the multilayer wiring structural body 13, and the metal plate 57 is patterned and a slot antenna 60 is formed.

Claims

1. A method of manufacturing a plurality of semiconductor devices, each semiconductor device including a multilayer wiring structural body having a laminated wiring pattern and an insulating layer, an antenna disposed on one surface of said multilayer wiring structural body, and an electronic component disposed on another surface of said multilayer wiring structural body opposite to the one surface of the multilayer wiring structural body, the electronic component being electrically connected to the multilayer wiring structural body, the manufacturing method comprising:

providing a first metal plate and a second metal plate;

pasting the first metal plate to the second metal plate such that a surface opposite to a surface of the first metal plate on which the multilayer wiring structural body is to be formed is opposed to a surface opposite to a surface of the second metal plate on which the multilayer wiring structural body is to be formed;

simultaneously forming the multilayer wiring structural bodies on the first and second metal plates such that the first and second metal plates support the respective multilayer wiring structural bodies while forming the respective multilayer wiring structural bodies; and

patterning the first and second metal plates to form the antennas in the first and second metal plates.

2. The method of manufacturing a plurality of semiconductor devices as claimed in claim 1, wherein forming the antennas is performed before pasting the first metal plate to the second metal plate.

3. The method of manufacturing a plurality of semiconductor devices as claimed in claim 1, further comprising:

separating the first metal plate on which the multilayer wiring structural body is formed from the second metal plate on which the multilayer wiring structural body is formed by cutting end portions of the first and second metal plates after forming the multilayer wiring structural bodies.

4. A method of manufacturing a semiconductor device, the semiconductor device including a multilayer wiring structural body having a laminated wiring pattern and an insulating layer, an antenna disposed on one surface of said multilayer wiring structural body, and an electronic component disposed on another surface of said multilayer wiring structural body opposite to the one surface of the multilayer wiring structural body, the electronic component being electrically connected to the multilayer wiring structural body, the manufacturing method comprising:

providing a metal plate;

forming the multilayer wiring structural body on the metal plate such that the metal plate supports the multilayer wiring structural body while forming the multilayer wiring structural body, wherein the multilayer wiring structural body is formed with at least a first layer formed on the metal plate and then a second layer formed on the first layer and the metal plate;

patterning the metal plate to form the antenna in the metal plate;

forming a connection, part for the electronic component on the another surface of said multilayer wiring structural body; and

mounting the electronic component on the connection part.

5. The method of manufacturing a semiconductor device as claimed in claim 4, wherein forming the antenna is performed before forming the multilayer wiring structural body.

6. A method of manufacturing a semiconductor device, the semiconductor device including a multilayer wiring structural body having a laminated wiring pattern and an insulating layer, an antenna disposed on one surface of said multilayer wiring structural body, and an electronic component disposed on another surface of said multilayer wiring structural body opposite to the one surface of the multilayer wiring structural body, the electronic component being electrically connected to the multilayer wiring structural body, the manufacturing method comprising:

providing a metal plate;

forming the multilayer wiring structural body on the metal plate such that the metal plate supports the multilayer wiring structural body while forming the multilayer wiring structural body, wherein the multilayer wiring structural body is formed in a series of steps with a first layer being formed on the metal plate and a plurality of successive layers being formed on top of the first layer;

patterning the metal plate to form the antenna in the metal plate;

forming a connection part for the electronic component on the another surface of said multilayer wiring structural body; and

mounting the electronic component on the connection part.

7. The method of manufacturing a semiconductor device as claimed in claim 6, wherein forming the antenna is performed before forming the multilayer wiring structural body.

8. A method of manufacturing a semiconductor device, the semiconductor device including a multilayer wiring structural body having a laminated wiring pattern and an insulating layer, an antenna disposed on one surface of said multilayer wiring structural body, and an electronic component disposed on another surface of said multilayer wiring structural body opposite to the one surface of the multilayer wiring structural body, the electronic component being electrically connected to the multilayer structural body, the manufacturing method comprising:

providing a metal plate;

forming the multilayer wiring structural body on the metal plate such that the metal plate supports the multilayer wiring structural body while forming the multilayer wiring structural body, wherein forming the multiplayer wiring structural body further comprises;

forming a first insulating layer on the metal plate;

forming first openings in the insulating layer to the metal plate; and

forming first wirings with conductive metal by electrolytic plating at least in the first openings;

patterning the metal plate to form the antenna in the metal plate;

forming a connection part for the electronic component on the another surface of said multilayer wiring structural body; and

mounting the electronic component on the connection part.

9. The method of manufacturing a semiconductor device of claim 8, further comprising:

forming a second insulating layer at least on the first wirings;

forming second opening in the second insulating layer to the first wirings; and

forming second wirings with conductive metal by electrolytic plating at least in the second openings.

10. The method of manufacturing a semiconductor device as claimed in claim 8, wherein forming the antenna is performed before forming the multilayer wiring structural body.