Device for reading a low-consumption non-volatile memory and its implementing method
First Claim
1. A device for reading a non-volatile memory, which consists of a matrix of memory cells, said device including means for addressing rows of the memory matrix to select at least one row of memory cells, means for addressing columns of the memory matrix to select columns for reading memory cells of the columns selected on a selected memory row in a read cycle controlled by a microprocessor unit, sense amplifiers, each connected to a respective memory cell for reading a column selected by the column addressing means, wherein all the sense amplifiers that are activated at the beginning of a read cycle by the microprocessor unit supply a binary data word representing the reading of the selected memory cells, comprising time-lag means activated at the beginning of each read cycle to supply a reference signal to control the read time of cells selected independently of the microprocessor unit, wherein this read time is determined to be sufficient to read all the valid data of the selected memory cells in each read cycle, wherein the time-lag means include a column of dummy reference cells that are programmed and matched to the memory cells of each column of the non-volatile memory, the column of dummy cells being connected by means of the column addressing means to a reference sense amplifier, which supplies the reference signal, and a time-lag capacitor connected to the column of dummy cells programmed to be non-conductive, which defines a parasitic capacitor combined with the time-lag capacitor having a determined capacitance to define the desired read time.
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Abstract
The reading device enables a non-volatile memory consisting of a matrix of memory cells (TM) to be read. Once the memory cells have been selected to be read in a read cycle controlled by a microprocessor unit, sense amplifiers (4) activated at the start of each cycle supply a binary data word (dx) representing the reading of the selected memory cells. The reading device also comprises time-lag means (3, MF, TF, Cgap) activated at the start of each read cycle. These time-lag means supply a reference signal (rd_mon) that controls the read time of the cells selected independently of the microprocessor unit. This read time is determined so that it is sufficient for reading all the valid data of the selected memory cells in each read cycle.
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11 Claims
- 1. A device for reading a non-volatile memory, which consists of a matrix of memory cells, said device including means for addressing rows of the memory matrix to select at least one row of memory cells, means for addressing columns of the memory matrix to select columns for reading memory cells of the columns selected on a selected memory row in a read cycle controlled by a microprocessor unit, sense amplifiers, each connected to a respective memory cell for reading a column selected by the column addressing means, wherein all the sense amplifiers that are activated at the beginning of a read cycle by the microprocessor unit supply a binary data word representing the reading of the selected memory cells, comprising time-lag means activated at the beginning of each read cycle to supply a reference signal to control the read time of cells selected independently of the microprocessor unit, wherein this read time is determined to be sufficient to read all the valid data of the selected memory cells in each read cycle, wherein the time-lag means include a column of dummy reference cells that are programmed and matched to the memory cells of each column of the non-volatile memory, the column of dummy cells being connected by means of the column addressing means to a reference sense amplifier, which supplies the reference signal, and a time-lag capacitor connected to the column of dummy cells programmed to be non-conductive, which defines a parasitic capacitor combined with the time-lag capacitor having a determined capacitance to define the desired read time.
Specification