Electronic device and timer therefor with tamper event time stamp features and related methods

• US 7,844,837 B2
• Filed: 09/13/2007
• Issued: 11/30/2010
• Est. Priority Date: 10/10/2002
• Status: Active Grant

• Current Assignee: STMicroelectronics Incorporated (STMicroelectronics NV)
• Original Assignee: STMicroelectronics Incorporated (STMicroelectronics NV)
• Inventors: Youssef, Tom
• Primary Examiner(s): Truong; Thanhnga B
• Application Number:
  US11/854,816
• Publication Number:
  US 20080001594A1
• Time in Patent Office: 1,174 Days
• Field of Search: 713/194, 713/178, 713/320, 713/500, 711/109, 340/573.4
• US Class Current: 713/194
• CPC Class Codes: G01R 21/133 by using digital technique
• CPC Class Codes: G01R 22/066 Arrangements for avoiding or indicating fraudulent use

Abstract

An electronic timer may include a clock reference signal generator and a real time clock (RTC) circuit for generating real time data based upon the clock reference signal. The RTC circuit may include a plurality of registers each for storing a respective bit of the real time data. Further, each register may include a master latch for initially storing the real time data bit, a slave latch for subsequently storing the real time data bit, and a user latch for storing the real time data bit from the slave latch. The RTC circuit may further include a controller for causing at least some of the registers to increment based upon the clock reference signal. Additionally, the electronic timer may also advantageously include a tamper circuit for receiving a tamper event signal and causing each of the user latches to hold a time stamp therein.

Claims

1. An electronic device comprising:

a housing;

a tamper sensor carried by said housing and configured to detect tampering with the electronic device and to generate a tamper event signal based thereon; and

an electronic timer connected to said tamper sensor and comprising;

a clock reference signal generator configured to generate a clock reference signal,

a real time clock (RTC) circuit configured to generate real time data based upon the clock reference signal, said RTC circuit comprising;

a plurality of registers configured to store respective bits of the real time data, each register comprising;

a master latch configured to initially store a real time data bit,

a slave latch configured to subsequently store the real time data bit, and

a user latch configured to store the real time data bit from said slave latch, and

a controller configured to cause at least some of said plurality of registers to increment based upon the clock reference signal, and

a tamper circuit configured to receive the tamper event signal from said tamper circuit and to cause said user latches to hold current real time data bits based thereon until said tamper circuit is reset by a user;

wherein said user latches thus providing user accessible real time data when the tamper event signal does not indicate tampering has occurred, and providing a user accessible time stamp when the tamper event signal does indicate tampering has occurred.

2. The electronic device of claim 1 further comprising:

at least one connector carried by said housing and configured to connect the electronic device to a supply line; and

a metering device carried by said housing and configured to measure throughput of the supply line.

3. The electronic device of claim 1 further comprising a processor carried by said housing and configured to process sales data.

4. The electronic device of claim 1 wherein said electronic timer is implemented in an integrated circuit;

and further comprising a package carrying said integrated circuit.

5. The electronic device of claim 4 wherein said package has external connection terminals;

and wherein said electronic timer further comprises a backup battery removably connected to said package and external connection terminals.

6. The electronic device of claim 4 wherein said package has external connection terminals;

and wherein said electronic timer further comprises a crystal being configured to cooperate with said clock reference signal generator to generate the clock reference signal, said crystal being removably connected to said package and external connection terminals.

7. The electronic device of claim 1 wherein said electronic timer further comprises an interface circuit connected to said RTC circuit and being configured to allow a user to access said user latches.

8. The electronic device of claim 1 wherein said electronic timer further comprises a backup battery and a supply voltage detection circuit being configured to selectively connect said backup battery to said clock reference signal generator, said RTC circuit, and said tamper circuit based upon a supply voltage being below a supply threshold.

9. The electronic device of claim 8 wherein said electronic timer further comprises a battery voltage detection circuit configured to provide a low battery voltage indication when the voltage of said backup battery is below a battery threshold.

10. The electronic device of claim 1 wherein said electronic timer further comprises a supply voltage detection circuit configured to prohibit user access to said user latches when a supply voltage falls below a low supply threshold.

11. A security method for determining the time of tampering with an electronic device, the method comprising:

generating a clock reference signal;

generating real time data based upon the clock reference signal by at least;

storing respective bits of the real time data in a plurality of registers, each register comprising;

a master latch for initially storing a real time data bit,

a slave latch for subsequently storing the real time data bit, and

a user latch for storing the real time data bit from the slave latch, and

incrementing the plurality of registers based upon the clock reference signal;

holding current real time data bits in the user latches based upon a tamper event signal indicating tampering with the electronic device; and

resuming storing real time data in the user latches based upon the tamper event signal being reset.

12. The method of claim 11 further comprising prohibiting user access to the user latches when a supply voltage is below a voltage threshold.

13. The method of claim 11 further comprising selectively connecting a backup battery to the plurality of registers based upon a supply voltage being below a supply threshold.