Direct wafer bonded 2-D CUMT array
First Claim
1. A capacitive micromachined ultrasonic transducer (CMUT) array comprising:
- a. a silicon on insulator (SOI) substrate, wherein said SOI substrate comprises a doped first silicon layer and a first insulating layer;
b. a doped second silicon layer, wherein said first insulating layer is disposed between said first silicon layer and said second silicon layer;
c. at least two active elements, wherein each said active element is separated by an isolation trench, wherein said isolation trench is disposed through at least said SOI second silicon layer and surrounds said active element, wherein said first silicon layer provides mechanical support between said active elements;
d. at least one cell disposed in said active element, wherein said cell comprises;
i. a cavity in said first silicon layer, wherein a cross section of said cavity comprises a horizontal cavity portion on top of vertical cavity portions disposed at each end of said horizontal cavity portion, wherein said vertical cavity portion spans from said first insulating layer through said first silicon layer, wherein a portion of said first silicon layer is isolated by said first insulating layer and said cavity;
ii. a membrane layer, wherein said membrane layer is disposed on said first silicon layer top surface, wherein said membrane layer spans across at least one said cavity; and
iii. a bottom electrode, wherein said bottom electrode is disposed on a bottom surface of said second silicon layer;
e. at least one ground contact element, wherein said ground contact element is isolated from said active elements by at least one said trench surrounding said ground contact element, wherein said ground contact element comprises;
i. a ground electrode, wherein said ground electrode is disposed on a bottom surface of said doped second silicon layer;
ii. at least one ground conductive via, wherein said ground conductive via is disposed from said ground electrode to said SOI first silicon layer; and
iii. a conductive top layer, wherein said conductive top layer electrically conducts with said membrane layer, wherein said conductive top layer electrically conducts with said ground conductive via through said SOI first silicon layer, wherein said ground conductive via electrically conducts with said ground electrode, wherein said ground electrodes conduct with said membrane layer; and
f. a separate electronic unit, wherein said bottom electrodes and said ground electrode are conductively connected to said electronic unit, wherein said ground contact elements are disposed at an end of said array.
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Accused Products
Abstract
A capacitive micromachined ultrasonic transducer (CMUT) array connected to a separate electronic unit is provided. The CMUT array includes at least two active elements, a ground element at the array end, and a non-active element having isolation trenches disposed between the active and ground elements. The active element includes a doped first silicon layer, a doped second silicon layer, and a first insulating layer disposed there between. A cavity is in the first silicon layer having a cross section that includes vertical portions disposed at each end of a horizontal portion, and the vertical portion spans from the first insulating layer through the first silicon layer such that a portion of the first silicon layer is isolated by the first insulating layer and the cavity. A membrane layer on the first silicon layer spans the cavity. A bottom electrode is disposed on the bottom of the second silicon layer.
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Citations
70 Claims
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1. A capacitive micromachined ultrasonic transducer (CMUT) array comprising:
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a. a silicon on insulator (SOI) substrate, wherein said SOI substrate comprises a doped first silicon layer and a first insulating layer; b. a doped second silicon layer, wherein said first insulating layer is disposed between said first silicon layer and said second silicon layer; c. at least two active elements, wherein each said active element is separated by an isolation trench, wherein said isolation trench is disposed through at least said SOI second silicon layer and surrounds said active element, wherein said first silicon layer provides mechanical support between said active elements; d. at least one cell disposed in said active element, wherein said cell comprises; i. a cavity in said first silicon layer, wherein a cross section of said cavity comprises a horizontal cavity portion on top of vertical cavity portions disposed at each end of said horizontal cavity portion, wherein said vertical cavity portion spans from said first insulating layer through said first silicon layer, wherein a portion of said first silicon layer is isolated by said first insulating layer and said cavity; ii. a membrane layer, wherein said membrane layer is disposed on said first silicon layer top surface, wherein said membrane layer spans across at least one said cavity; and iii. a bottom electrode, wherein said bottom electrode is disposed on a bottom surface of said second silicon layer; e. at least one ground contact element, wherein said ground contact element is isolated from said active elements by at least one said trench surrounding said ground contact element, wherein said ground contact element comprises; i. a ground electrode, wherein said ground electrode is disposed on a bottom surface of said doped second silicon layer; ii. at least one ground conductive via, wherein said ground conductive via is disposed from said ground electrode to said SOI first silicon layer; and iii. a conductive top layer, wherein said conductive top layer electrically conducts with said membrane layer, wherein said conductive top layer electrically conducts with said ground conductive via through said SOI first silicon layer, wherein said ground conductive via electrically conducts with said ground electrode, wherein said ground electrodes conduct with said membrane layer; and f. a separate electronic unit, wherein said bottom electrodes and said ground electrode are conductively connected to said electronic unit, wherein said ground contact elements are disposed at an end of said array. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24)
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25. A method of fabricating a capacitive micromachined ultrasonic transducer (CMUT) array comprising:
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a. providing a first silicon on insulator (SOI) substrate, wherein said first SOI substrate comprises a doped first silicon layer and a first insulating layer; b. providing a doped second silicon layer, wherein said first insulating layer is disposed between said first silicon layer and said second silicon layer; c. forming at least two active elements, wherein said active element is separated by an isolation trench surrounding said active element, wherein said trench is disposed through at least said SOI second silicon layer, wherein said first silicon layer provides mechanical support between said active elements; d. forming at least one cell in said active element comprising; i. forming at least one horizontal cavity portion in said first silicon layer; ii. forming a vertical cavity portion at each end of said at least one horizontal cavity portion, wherein said vertical cavity portion spans from said first insulating layer through said first silicon layer; iii. depositing a second insulating layer on said on a top surface of said first silicon layer, on the walls of said vertical cavity portion and on a top surface of said isolated silicon layer portion of said first silicon layer, wherein said isolated silicon layer portion is enveloped by said first insulating layer and said second insulating oxide layer; iv. bonding a silicon substrate to said second insulating layer of said top surface of said first silicon layer, wherein a bottom region of said silicon substrate is a conductive membrane layer; and v. removing a top region of said silicon substrate, wherein said silicon substrate bottom region forms said membrane layer across at least one said cavity; e. forming at least one ground contact element, wherein said ground contact element is isolated from said active elements by at least one said trench surrounding said ground contact element, wherein said ground contact element comprises; i. a ground electrode, wherein said ground electrode is disposed on a bottom surface of said doped second silicon layer; ii. at least one ground conductive via, wherein said ground conductive via is disposed from said ground electrode to said SOI first silicon layer; and iii. a conductive top layer, wherein said conductive top layer electrically conducts with said membrane layer, wherein said conductive top layer electrically conducts with said ground conductive via through said SOI first silicon layer, wherein said ground conductive via electrically conducts with said ground electrode, wherein said ground electrodes conduct with said membrane layer; and f. providing a separate electronic unit, wherein said bottom electrodes and said ground electrodes are conductively connected to said electronic unit, wherein said ground contact elements are disposed at an end of said array. - View Dependent Claims (26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38)
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39. A method of fabricating a capacitive micromachined ultrasonic transducer (CMUT) array comprising:
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a. providing a first silicon on insulator (SOI) substrate, wherein said first SOI substrate comprises a doped first silicon layer and a first insulating layer; b. providing a doped second silicon layer, wherein said first insulating layer is disposed between said first silicon layer and said second silicon layer; c. forming at least two active elements, wherein said active element is separated by an isolation trench surrounding said active element, wherein said trench is disposed through at least said SOI second silicon layer, wherein said first silicon layer provides mechanical support between said active elements; d. forming at least one cell in said active element comprising; i. forming at least one horizontal cavity portion in said first silicon layer; ii. forming a vertical cavity portion at each end of said at least one horizontal cavity portion, wherein said vertical cavity portion spans from said first insulating layer through said first silicon layer; iii. depositing a second insulating layer on said on a top surface of said first silicon layer, on the walls of said vertical cavity portion and on a top surface of said isolated silicon layer portion of said first silicon layer, wherein said isolated silicon layer portion is enveloped by said first insulating layer and said second insulating oxide layer; iv. bonding a silicon substrate to said second insulating layer of said top surface of said first silicon layer, wherein a bottom region of said silicon substrate is a conductive membrane layer; and v. removing a top region of said silicon substrate, wherein said silicon substrate bottom region forms said membrane layer across at least one said cavity; e. forming at least one ground contact element, wherein said ground contact element is isolated from said active elements by at least one said trench surrounding said ground contact element, wherein said ground contact element comprises; i. a ground electrode, wherein said ground electrode is disposed on a bottom surface of said doped second silicon layer; ii. at least one ground conductive via, wherein said ground conductive via is disposed from said ground electrode to said SOI first silicon layer; and iii. a conductive top layer, wherein said conductive top layer electrically conducts with said membrane layer, wherein said conductive top layer electrically conducts with said ground conductive via through said SOI first silicon layer, wherein said ground conductive via electrically conducts with said ground electrode, wherein said ground electrodes conduct with said membrane layer; and f. providing a separate electronic unit, wherein said bottom electrodes and said ground electrodes are conductively connected to said electronic unit, wherein said ground contact elements are disposed at an end of said array. - View Dependent Claims (40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50)
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51. A capacitive micromachined ultrasonic transducer (CMUT) array comprising:
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a. a doped first silicon layer; b. a first insulating layer, wherein said doped first silicon layer is disposed on said first insulating layer; c. at least two active elements; d. at least one cell disposed in said active element, wherein said cell comprises; i. a cavity in said first silicon layer, wherein a cross section of said cavity comprises a horizontal cavity portion on top of vertical cavity portions disposed at each end of said horizontal cavity portion, wherein said vertical cavity portion spans from said first insulating layer through said first silicon layer, wherein a portion of said first silicon layer is isolated by said first insulating layer and said cavity; ii. a membrane layer, wherein said membrane layer is disposed on said first silicon layer top surface, wherein said membrane layer spans across at least one said cavity; and iii. a bottom electrode, wherein said bottom electrode is disposed on a bottom surface of said second silicon layer; e. at least one ground contact element, wherein said ground contact element is isolated from said active elements by a trench disposed through at least said SOI second silicon layer, wherein said ground contact element comprises; i. a ground electrode, wherein said ground electrode is disposed on a bottom surface of said doped second silicon layer; ii. at least one ground conductive via, wherein said ground conductive via is disposed from said ground electrode to said SOI first silicon layer; and iii. a conductive top layer, wherein said conductive top layer electrically conducts with said membrane layer, wherein said conductive top layer electrically conducts with said ground conductive via through said SOI first silicon layer, wherein said ground conductive via electrically conducts with said ground electrode, wherein said ground electrodes conduct with said membrane layer; and f. a separate electronic unit, wherein said bottom electrodes and said ground electrode is conductively connected to said electronic unit, wherein said ground contact elements are disposed at an end of said array. - View Dependent Claims (52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70)
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Specification