×

Transconductance amplifier

  • US 7,847,635 B2
  • Filed: 08/27/2007
  • Issued: 12/07/2010
  • Est. Priority Date: 08/28/2006
  • Status: Active Grant
First Claim
Patent Images

1. A transconductance amplifier which supplies an output current proportional to an input voltage, characterized by comprising:

  • a differential pair which is formed of first and second MOS transistors having a common source, and which operates in a triode region;

    a third MOS transistor of which a source terminal is connected to a drain terminal of the first MOS transistor, and which operates in a saturation region;

    a fourth MOS transistor of which a source terminal is connected to a drain terminal of the second MOS transistor, and which operates in the saturation region;

    a first amplifier of which a negative input terminal is connected to the source terminal of the third MOS transistor and of which an output terminal is connected to a gate terminal of the third MOS transistor;

    a second amplifier of which negative input terminal is connected to the source terminal of the fourth MOS transistor and of which output terminal is connected to a gate terminal of the fourth MOS transistor;

    a voltage generator circuit which generates a tuning voltage inputted to positive input terminal voltages of the first and second amplifiers, and a common voltage of first and second voltages inputted to the differential pair so that a difference between the tuning voltage and the common voltage is equal to a constant; and

    a differential-pair input voltage generator circuit which is supplied with a common voltage, and which generates the first voltage outputted to a gate terminal of the first MOS transistor, and the second voltage outputted to a gate terminal of the second MOS transistor, characterized in thatthe second voltage is equal to 2×

    (the common voltage)−

    (the first voltage),the input voltage is equal to a difference between the first voltage and the second voltage, andthe output current is equal to a difference between a first current Ip flowing through the drains and sources of the first and third MOS transistors and a second current In flowing through the drains and sources of the second and fourth MOS transistors.

View all claims
  • 1 Assignment
Timeline View
Assignment View
    ×
    ×