CMOS RF switch for high-performance radio systems

• US 7,848,712 B2
• Filed: 05/03/2007
• Issued: 12/07/2010
• Est. Priority Date: 05/03/2007
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Fu, Chang-Tsung, Taylor, Stewart S.
• Primary Examiner(s): Tran; Tuan A
• Application Number:
  US11/799,981
• Publication Number:
  US 20080272824A1
• Time in Patent Office: 1,314 Days
• Field of Search: 455 73- 84, 455/552.1, 455/553.1, 333/101, 333/103, 333/104, 327/308, 327/365
• US Class Current: 455/80
• CPC Class Codes: H03K 17/145 in field-effect transistor switches
• CPC Class Codes: H03K 17/162 without feedback from the output circuit to the control circuit
• CPC Class Codes: H03K 17/693 Switching arrangements with several input- or output-terminals, e.g. multiplexers, distributors logic circuits H03K19/00; code converters H03M5/00, H03M7/00
• CPC Class Codes: H03K 2217/0018 Special modifications or use of the back gate voltage of a FET
• CPC Class Codes: H04B 1/44 Transmit/receive switching

Abstract

A wireless device includes high-performance CMOS RF switches that include serially connected transistors coupled between an input terminal and an output terminal, with an inductor coupled from the input to the output that resonates out the capacitance of the transistors to improve isolation. The transistors have a floating/bootstrapped body with remote body contacts.

Claims

1. A switch, comprising:

a first transistor serially connected to a second transistor;

a first resistor connected from a bias terminal to a source terminal of the first transistor, a second resistor connected from the bias terminal to a drain terminal of the first transistor and to a source terminal of the second transistor, and a third resistor connected from the bias terminal to a drain terminal of the second transistor; and

an inductor having a first terminal connected to the source terminal of the first transistor and a second terminal connected to the drain terminal of the second transistor.

2. The switch of claim 1 wherein the first and second transistors have a floating body that is bootstrapped using body contacts.

3. The switch of claim 1 wherein the switch is controlled to be on or off by a difference in a voltage potential supplied to the bias terminal and a voltage bias supplied to gates of the first and second transistors.

4. The switch of claim 1 further including DC blocking capacitors to isolate an input terminal of the switch from the source terminal of the first transistor and an output terminal of the switch the drain terminal of the second transistor.

5. A switch circuit, comprising:

first and second serially connected transistors coupled between an input and an output, where the transistors have source and drain terminals coupled to a bias terminal via first, second and third resistors; and

an inductor connected in parallel with the first and second serially connected transistors.

6. The switch circuit of claim 5 further including first and second DC blocking capacitors to isolate the input terminal and the output terminal of the switch from the first and second serially connected transistors.

7. The switch circuit of claim 5 further including a bias terminal to supply a voltage bias to a gate of the first transistor and a gate of the second transistor.

8. A radio comprising:

an antenna;

a transceiver; and

a switch having an input coupled to the antenna and an output coupled to the transceiver, the switch including first and second serially connected transistors connected in parallel with an inductor between the input and the output, the switch further including first, second and third resistors connected to a bias terminal and to the source and drain terminals of the first and second transistors.

9. The radio of claim 8 wherein the switch and the transceiver are embedded on-chip using a CMOS technology.

10. The radio of claim 9 wherein a difference in a DC voltage supplied at the bias terminal and a DC bias supplied to gate terminals of the first and second transistors control an on or an off condition of the switch.

11. The radio of claim 8 wherein the switch further includes first and second DC blocking capacitors to isolate the input and the output of the switch from the first and second serially connected transistors.

12. The radio of claim 8 wherein the first and second serially connected transistors have a floating body that is bootstrapped using body contacts.

13. A method to demodulate an over-the-air signal, comprising:

receiving the over-the-air signal at an antenna;

providing the over-the-air signal from the antenna at an input terminal of a switch having first and second serially connected transistors coupled between the input terminal and an output terminal, where the first and second serially connected transistors have source and drain terminals coupled to a bias terminal via resistors; and

controlling a DC voltage provided to gate terminals of the first and second serially connected transistors to be greater than a DC bias supplied at the bias terminal to set the switch to an on condition.

14. The method of claim 13 further including coupling a first resistor between the bias terminal and a source terminal of the first transistor;

coupling a second resistor between the bias terminal and a drain terminal of the first transistor in common with a source terminal of the second transistor; and

coupling a third resistor between the bias terminal and a drain terminal of the second transistor.

15. The method of claim 13 further including using body contacts to contact a floating body of the first and second serially connected transistors that is bootstrapped.

16. The method of claim 13 further including supplying the over-the-air signal from the output terminal of the switch to a Low Noise Amplifier (LNA).