Apparatus and method for producing identifiers regardless of mixed device type in a serial interconnection

• US 7,853,727 B2
• Filed: 03/28/2007
• Issued: 12/14/2010
• Est. Priority Date: 12/06/2006
• Status: Expired due to Fees

• Current Assignee: NovaChips Canada Inc. (NovaChips Co., Ltd.)
• Original Assignee: Mosaid Technologies Incorporated (MOSAID Technologies Inc. (f/k/a Conversant Intellectual Property Management))
• Inventors: Sumi, Shuji, Kim, Jin-Ki, Oh, HakJune, Pyeon, Hong Beom
• Primary Examiner(s): Kindred; Alford W
• Assistant Examiner(s): Abad; Farley J
• Application Number:
  US11/692,446
• Publication Number:
  US 20080192649A1
• Time in Patent Office: 1,357 Days
• Field of Search: 710/4, 710/10, 710/8, 710/9, 710/24
• US Class Current: 710/8
• CPC Class Codes: G11C 7/1051 Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
• CPC Class Codes: G11C 7/1063 Control signal output circuits, e.g. status or busy flags, feedback command signals
• CPC Class Codes: G11C 7/1078 Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
• CPC Class Codes: G11C 7/109 Control signal input circuits

Abstract

A plurality of memory devices of mixed type (e.g., DRAMs, SRAMs, MRAMs, and NAND-, NOR- and AND-type Flash memories) is serially interconnected. Each device has device type information on its device type. A specific device type (DT) and a device identifier (ID) contained in a serial input (SI) as a packet are fed to one device of the serial interconnection. The device determines whether the fed DT matches the DT of the device. In a case of match, a calculator included in the device performs calculation to generate an ID accompanying the fed DT for another device and the fed ID is latched in a register of the device. In a case of no match, the ID generation is skipped and no ID is generated for another device. The DT is combined with the generated or the received ID depending on the device type match determination. The combined DT and ID is as a packet transferred to a next device. Such a device type match determination and ID generation or skip are performed in all devices of the serial interconnection. With reference to device type provided to the interconnected devices, IDs are sequentially generated. The SI containing the DT, the ID and an ID generation command is transmitted in a packet basis to a next device. A memory controller can recognize the total number of one DT, in response to the ID received from the last device. In a case of a “don'"'"'t care” DT is provided to the interconnected devices, IDs are sequentially generated and the total number of the interconnected devices is recognized, regardless of the differences in DTs of the devices.

Claims

1. A system comprising:

a signal processor for outputting an initial serial input signal including a search device type and an initial device identifier, and receiving a last serial output signal; and

a serial interconnection configuration of first to N-th semiconductor memory devices of mixed types, N being an integer greater than one, each of the semiconductor memory devices having a semiconductor memory associated therewith, and a device type, the device type being related to the semiconductor memory;

each i-th semiconductor memory device of the first to N-th semiconductor memory devices, where i is one to N, having

a serial input connection for receiving the initial serial input signal or a serial input signal from an (i−

1)-th semiconductor memory device and

a serial output connection for providing a serial output signal including a combination of the search device type and a propagated device identifier as the serial input signal to the (i+1)-th semiconductor memory device except for the i=N-th semiconductor memory device that provides the signal processor with the last serial output signal having the combination of the search device type and a last device identifier,

the serial input connection of the i-th semiconductor memory device being coupled to the signal processor or the serial output connection of an (i−

1)-th semiconductor memory device,

the serial output connection of the i-th semiconductor memory device being coupled to the serial input connection of an (i+1)-th semiconductor memory device or the signal processor,

the initial serial input signal provided to the serial input connection of the first semiconductor memory device of the first to N-th semiconductor memory devices being propagated through the first to N-th semiconductor memory devices with or without the initial device identifier or the propagated device identifier being altered as each i-th semiconductor memory device is configured to determine the device type of the i-th semiconductor memory device by comparing the device type of the i-th semiconductor memory device to the search device type, each i-th semiconductor memory device modifying the initial device identifier to provide the propagated device identifier or the propagated device identifier to provide the last device identifier, in response to the comparison to provide the serial output signal or the last serial output signal, the last serial output signal including the last device identifier.

2. The system of claim 1, wherein each i-th semiconductor memory devices comprises:

a receiver for receiving the initial device identifier or the propagated device identifier and the search device type provided through the serial input connection of the i-th semiconductor memory device;

a determiner for comparing the device type of the i-th semiconductor memory device to the search device type to provide a determination result;

an output device identifier provider for outputting an output device identifier in response to the determination result; and

an information provider for providing a combination of the search device type and the initial device identifier or propagated device identifier as the output device identifier, the output device identifier corresponding to the serial output signal or the last serial output signal.

3. The system of claim 2, wherein the output device identifier provider comprises:

a calculator for performing a calculation based on the initial device identifier or the propagated device identifier and a pre-defined value to produce a calculated device identifier.

4. The system of claim 3, wherein each i-th semiconductor memory device further comprises:

a device type provider for providing device type information associated with the i-th semiconductor memory device as a reference device type.

5. The system of claim 4, wherein the determiner comprises:

a comparator for comparing the search device type with the reference device type to provide the determination result.

6. The system of claim 5, wherein the output device identifier provider further comprises:

a selector for selecting the

initial device identifier or the calculated device identifier as the output device identifier in response to the determination result, or the propagated device identifier or the calculated device identifier as the output device identifier in response to the determination result, the output device identifier being outputted from the output device identifier provider.

7. The system of claim 6, wherein the receiver comprises:

a register;

for registering the initial device identifier or the propagated device identifier and the search device type in serial manner to provide a registered device identifier; and

for outputting each of the registered device identifier and the search device type in a parallel manner,

the search device type being provided to the comparator in parallel, the initial device identifier or the propagated device identifier being provided to the calculator in parallel.

8. The system of claim 7, wherein the device type provider comprises:

a device type information storage for;

holding the device type information corresponding to the device type of the i-th semiconductor memory device; and

providing the device type information as the reference device type for the comparator.

9. The system of claim 1, wherein the signal processor comprises:

a serial output receiver for receiving the last serial output signal from the N-th semiconductor memory device.

10. The system of claim 9, wherein the serial output receiver comprises:

a recognizer for recognizing a device identifier number contained in the last serial output signal from the N-th semiconductor memory device, the number of semiconductor memory devices being obtained from the device identifier number with respect to a specific device type provided by the signal processor.

11. The system of claim 2, wherein the search device type and the initial device identifier or the propagated device identifier are transmitted as a packet.

12. The system of claim 11, wherein:

the packet includes a device identifier generation command for instructing each i-th semiconductor memory device to execute a device identifier generation operation; and

the determiner includes a packet interpreter for interpreting the device identifier generation command and the search device type.

13. The system of claim 12, wherein the information provider comprises:

a combiner for combining the device identifier generation command, the search device type and the initial device identifier or the propagated device identifier; and

a packet output provider for providing the device identifier generation command, search device type and initial device identifier or propagated device identifier in the packet.

14. The system of claim 6, wherein the receiver comprises:

a register for registering the calculated device identifier or the propagated device identifier and the search device type in serial manner to provide a registered device identifier.

15. An apparatus for outputting a device identifier at an i-th semiconductor memory device coupled to an (i+1)-th semiconductor memory device in a serial interconnection configuration where i is an integer value, the i-th semiconductor memory device having a serial input connection coupled to a serial output connection of an (i−

1)-th semiconductor memory device in the serial interconnection configuration, the (i+1)-th semiconductor memory device having a serial input connection coupled to a serial output connection of the i-th semiconductor memory device, each i-th semiconductor memory device having a semiconductor memory associated therewith and a device type, the device type being related to the semiconductor memory, each of the semiconductor memory devices being of different types, the apparatus comprising;

a receiver for receiving an input device identifier and an input device type through the serial input connection of the i-th semiconductor memory device;

a determiner for performing;

a determination of whether the device type of the i-th semiconductor memory device contains pre-defined data corresponding to any device type of the different types in response to the input device type to provide a determination result; and

an output device identifier provider for outputting the input device identifier with or without being altered as the device identifier in response to the determination result.

16. The apparatus of claim 15, wherein the determination is a first determination and the determination result is a first determination result, and the determiner further performs:

a second determination of the device type of the i-th semiconductor memory device by comparing the device type of the i-th semiconductor memory device to the input device type to provide a second determination result.

17. The apparatus of claim 16, wherein the output device identifier provider comprises:

a calculator for performing a calculation of the input device identifier with a pre-defined value to produce a calculated device identifier.

18. The apparatus of claim 17, further comprising:

a device type provider for providing device type information of the i-th semiconductor memory device.

19. The apparatus of claim 18, wherein the determiner comprises:

a first device type determiner for determining whether the pre-defined data is contained in the input device type to provide the first determination result; and

a second device type determiner for determining whether the device type information is contained in the input device type to provide the second determination result.

20. The apparatus of claim 19, wherein the output device identifier provider further comprises:

a selector for selecting the input device identifier or the calculated device identifier as the output device identifier in response to the first determination result and the second determination result, the output device identifier being outputted through the output connection of the i-th semiconductor memory device.

21. The apparatus of claim 20, wherein the receiver comprises:

a register;

for registering the input device identifier to provide a registered device identifier and the input device type in serial manner; and

for outputting each of the registered device identifier and the input device type in parallel manner,

the input device type being provided to the comparator in a parallel manner, the registered device identifier being provided to the calculator in a parallel manner.

22. The apparatus of claim 21, wherein the determiner further comprises:

a device type information storage for;

holding the device type information corresponding to the device type of the i-th semiconductor memory device; and

providing the device type information for the second determination.

23. The apparatus of claim 19, wherein:

the first device type determiner comprises a decoder for decoding the input device type to provide the first determination result when the pre-defined data is detected; and

the second device type determiner comprises a comparator for comparing the input device type with the device type information to provide the second determination result.

24. The apparatus of claim 19, wherein:

the first device type determiner comprises a first comparator for comparing the input device type with the pre-defined data to provide the first determination result; and

the second device type determiner comprises a second comparator for comparing the input device type with the device type information to provide the second determination result.

25. A system comprising a plurality of semiconductor memory devices of mixed types in a serial interconnection configuration, each of the plurality of semiconductor memory devices having a semiconductor memory associated therewith and a device type, the device type being related to the semiconductor memory, an i-th semiconductor memory device having a serial input connection coupled to a serial output connection of an (i-1)-th semiconductor memory device where i is an integer number, an (i+1)-th semiconductor memory device having a serial input connection coupled to a serial output connection of the i-th semiconductor memory device, at least one of the semiconductor memory devices comprising:

a receiver for receiving a device identifier and a search device type provided through the serial input connection of the at least one of the semiconductor memory devices;

a determiner for providing a determination result corresponding to a determination of the device type of the at least one of the semiconductor memory devices based on the search device type or whether the device type of the at least one of the semiconductor memory devices contains pre-defined data corresponding to any of the mixed types; and

an output device identifier provider for outputting an output device identifier corresponding to the at least one of the semiconductor memory devices in response to the determination result, the output device identifier including the device identifier with or without being altered.

26. The system of claim 25, wherein the output device identifier provider comprises:

a calculator for performing a calculation of the modified device identifier based on the device identifier and a pre-defined value; and

a pass operator for passing the device identifier,

wherein, in response to the determination result, the modified device identifier or the device identifier is provided by the device identifier assignor.

27. The system of claim 26, wherein the at least one of the semiconductor memory devices further comprises:

a device information provider for providing device type information of the at least one of the semiconductor memory devices.

28. The system of claim 27, wherein the determiner comprises:

a comparator for comparing the search device type to the device type information to provide the determination result.

29. The system of claim 28, wherein the output device identifier provider further comprises:

a selector for selecting the modified device identifier or the device identifier as the output device identifier in response to the determination result from the comparator, the output device identifier being outputted through the output connection of the at least one of the semiconductor memory devices.

30. The system of claim 29, wherein the receiver comprises:

a holder for holding the device identifier and the search device type, the held device identifier and the search device type being provided to the calculator and the comparator, respectively.

31. The system of claim 30, wherein the holder comprises:

a first serial to parallel holder for holding the device identifier in a serial manner and outputting the device identifier in a parallel manner; and

a second serial to parallel holder for holding the device type in a serial manner and outputting the device type in a parallel manner.

32. The system of claim 31, wherein the output device identifier provider further comprises:

a parallel to serial holder for holding the modified device identifier in a parallel manner and outputting the modified device identifier in a serial manner.

33. The system of claim 32, wherein the device information provider comprises:

an information storage for storing the device type information on the mixed types of the plurality of semiconductor memory devices, the device type information being provided in a parallel manner to the comparator.

34. The system of claim 33, wherein:

the information storage comprises a storage capable of;

storing the device type information corresponding to different types of semiconductor memory devices; and

providing one of the device type information corresponding to a selected type of the semiconductor memory devices.

35. The system of claim 25, wherein the mixed types comprise more than one type of random access memories and Flash memories.

36. The system of claim 35, wherein the at least one of the semiconductor memory devices further comprises:

a device identifier holder for holding the device identifier in response to the determination result.

37. A method for assigning a device identifier number for first to N-th semiconductor memory devices of mixed types in a serial interconnection configuration, where N is an integer greater than one, each of the first to N-th semiconductor memory devices having a semiconductor memory associated therewith and a device type, the device type being related to the semiconductor memory, an i-th semiconductor memory device having a serial input connection coupled to a serial output connection of an (i−

1)-th semiconductor memory device, where i is one to N, an (i+1)-th semiconductor memory device having a serial input connection coupled to a serial output connection of the i-th semiconductor memory device, the method comprising;

providing a search device type to the i-th semiconductor memory device;

holding the search device type at the i-th semiconductor memory device;

determining whether the search device type matches a reference device type associated with the i-th semiconductor memory device to provide a first determination result;

determining whether the device type of the i-th semiconductor memory device contains pre-defined data corresponding to any device type of the different types to provide a second determination result;

outputting a device identifier through the serial input connection of the i-th semiconductor memory device; and

at the i-th semiconductor memory device wherein the device identifier is provided, conducting a device identifier assignment to assign the device identifier as the device identifier number for the i-th semiconductor memory device in response to the first determination result and the second determination result at the i-th semiconductor memory device.

38. A method for use in a serial interconnection configuration of N semiconductor memory devices of mixed types, N being an integer greater than one, each semiconductor memory device having a semiconductor memory associated therewith and a device type, the device type being based on the semiconductor memory, a first semiconductor memory device of the N semiconductor memory devices having a serial input connection coupled to a serial output connection of a previous semiconductor memory device of the N semiconductor memory devices, a second semiconductor memory device of the N semiconductor memory devices having a serial input connection coupled to a serial output connection of the first semiconductor memory device, each i-th semiconductor memory device of the N semiconductor memory devices determining the device type of the i-th semiconductor memory device in response to a search device type and providing a combination of an output device type and a device identifier, where i is one to N;

the method comprising;

providing a serial input signal containing the search device type to the first semiconductor memory device, the output device type being propagated through the N semiconductor memory devices and the device identifier being propagated through the N semiconductor memory devices with or without being altered in response to the determination of the device type; and

receiving a serial output signal containing the output device type and the device identifier provided from the N-th semiconductor memory device.

39. The method of claim 38, wherein the step of receiving further comprises:

recognizing a device identifier number contained in the serial input signal from the serial output connection of the N-th semiconductor memory device.

40. The method of claim 39, wherein:

the step of providing comprises;

providing a unique device type accompanied with an initial device identifier number contained in the serial input signal to the first semiconductor memory device, the unique device type matching any of the mixed types of the semiconductor memory devices, the serial input signal containing a device identifier number altered by the i-th semiconductor memory device in response to a determination result; and

the step of recognizing comprises;

receiving the serial output signal containing the device identifier number accompanied with the unique device type from the N-th semiconductor memory device; and

recognizing the number of the semiconductor memory devices in the serial interconnection configuration based on the device identifier number.

41. The method of claim 40, wherein the step of providing further comprises:

providing a device identifier generation command; and

combining the device identifier generation command, the initial device identifier number and the unique device type into the serial input signal.

42. The method of claim 41, wherein the unique device type and the initial device identifier are transmitted as a packet.

43. A machine-readable medium storing commands and instructions which, when executed, cause a processor to perform a method of receiving an output signal from a last semiconductor memory device of N semiconductor memory devices of mixed types in a serial interconnection, N being an integer greater than one, each of the N semiconductor memory devices having a semiconductor memory associated therewith and a device type, the device type being based on the semiconductor memory, a first semiconductor memory device of the N semiconductor memory devices having a serial input connection coupled to a serial output connection of a previous semiconductor memory device of the N semiconductor memory devices, a second semiconductor memory device of the N semiconductor memory devices having a serial input connection coupled to a serial output connection of the first semiconductor memory device, each i-th semiconductor memory device of the N semiconductor memory devices determining the device type of the i-th semiconductor memory device in response to a search device type and providing a combination of an output device type and a device identifier, the method comprising:

providing a serial input signal containing the search device type to the first semiconductor memory device, the output device type being propagated through the N semiconductor memory devices and the device identifier being propagated through the N semiconductor memory devices with or without being altered in response to the determination of the device type; and

receiving a serial output signal containing the output device type and the device identifier provided from the N-th semiconductor memory device.

44. The machine-readable medium of claim 43, wherein the method further comprises:

providing a device identifier generation command;

providing in the serial input signal a unique device type accompanied with an initial device identifier number and the device identifier generation command to the first semiconductor memory device, the unique device type matching any of the mixed types of the semiconductor memory devices, the serial input signal containing a device identifier number altered by the i-th semiconductor memory device in response to the determination of the device type of the i-th semiconductor memory device;

receiving the serial output signal containing the device identifier number from the N-th semiconductor memory device; and

recognizing a number of the N semiconductor memory devices in the serial interconnection configuration based on the device identifier number.

45. The machine-readable medium of claim 44, wherein the method further comprises:

combining the device identifier generation command, the initial device identifier number and the unique device type to provide combined data; and

providing the serial input signal containing the combined data as a packet to the first semiconductor memory device of the serial interconnection configuration.

46. A machine-readable medium storing commands and instructions which, when executed, cause a processor to perform a method of assigning a device identifier for a plurality of semiconductor memory devices of mixed types in a serial interconnection configuration, each of the plurality of semiconductor memory devices having a semiconductor memory associated therewith and a device type, the device type being related to the semiconductor memory, an i-th semiconductor memory device of the plurality of semiconductor memory devices having a serial input connection coupled to a serial output connection of an (i-1)-th semiconductor memory device of the plurality of semiconductor memory devices, an (i+1)-th semiconductor memory device of the plurality of semiconductor memory devices having a serial input connection coupled to a serial output connection of the i-th semiconductor memory device, where i is an integer number, the method being adopted to be executed in at least one of the plurality of semiconductor memory devices, the method comprising:

receiving the device identifier and a search device type through the serial input connection of the i-th semiconductor memory device;

performing;

a first determination whether the device type of the i-th semiconductor memory device contains pre-defined data corresponding to any of the mixed device types to provide a first determination result; and

a second determination of the device type of the i-th semiconductor memory device by comparing the device type of the i-th semiconductor memory device to the search device type received at the serial input connection of the i-th semiconductor memory device to provide a second determination result; and

outputting an output device identifier containing the device identifier of the i-th semiconductor memory device in response to the first determination result and the second determination result.

47. The machine-readable medium of claim 46, wherein the step of performing comprises:

performing the first determination of whether the search device type of the i-th semiconductor memory device matches the pre-defined data; and

performing the second determination of whether the search device type matches a reference device type assigned to the i-th semiconductor memory device.

48. The machine-readable medium of claim 47, wherein the method further comprises:

receiving a device identifier generation command;

combining the device identifier generation command, the search device type and the device identifier to provide combined data; and

providing the serial output signal containing the combined data as a packet.

49. A method for determining a device identifier in a serial interconnection configuration of first to N-th semiconductor memory devices of mixed types, N being an integer greater than one, each of the first to N-th semiconductor memory devices having a semiconductor memory associated therewith and a device type, the device type being related to the semiconductor memory, an i-th semiconductor memory device where i is one to N, having a serial input connection coupled to a serial output connection of an (i−

1)-th semiconductor memory device, an (i+1)-th semiconductor memory device having a serial input connection coupled to a serial output connection of the i-th semiconductor memory device, the method being adopted for execution in at least one of the first to N-th semiconductor memory devices, the method comprising;

receiving a device identifier and a search device type through the serial input connection of the i-th semiconductor memory device;

performing;

in response to the search device type received through the serial input connection, a first determination whether the device type of the i-th semiconductor memory device contains pre-defined data corresponding to any device type to provide a first determination result; and

outputting an output device identifier in response to the first determination result.

50. The method of claim 49, wherein the step of performing a first determination comprises:

comparing the search device type received through the serial input connection to the device type of the i-th semiconductor memory device.

51. The method of claim 50, wherein:

the step of performing further comprises

performing a second determination of the device type of the i-th semiconductor memory device by comparing the device type of the i-th semiconductor memory device to the search device type received through the serial input connection to provide a second determination result; and

the step of outputting comprises

outputting the output device identifier in response to the first and second determination results.

52. The method of claim 51, wherein:

the step of performing the first determination comprises determining whether the search device type matches the pre-defined data of the i-th semiconductor memory device; and

the step of performing the second determination comprises determining whether the search device type matches a reference device type as the device type assigned to the i-th semiconductor memory device.

53. The method of claim 52, wherein:

the step of performing the first determination further comprises;

providing a pre-defined value as the pre-defined data that corresponds to any device type.

54. The method of claim 50, wherein:

the step of performing the first determination is executed before the step of performing the second determination.