Methods of using one of a plurality of configuration bitstreams for an integrated circuit
First Claim
1. A method of implementing an integrated circuit using one of a plurality of configuration bitstreams for a design implemented in the integrated circuit, the method comprising:
- generating, by a computer, a plurality of implementations of the design;
analyzing the plurality of implementations of the design to determine initial variations in timing among the implementations;
modifying at least one implementation of the plurality of implementations to reduce the variations in timing among the plurality of implementations; and
outputting a plurality of configuration bitstreams for the plurality of implementations having variations in timing that are reduced relative to the initial variations in timing.
1 Assignment
0 Petitions
Accused Products
Abstract
Methods of using one of a plurality of configuration bitstreams in an integrated circuit are disclosed. An exemplary method comprises analyzing the plurality of implementations of a design to determine initial variations in timing among the implementations; modifying the implementations to reduce the variations in timing among the implementations; and outputting a plurality of configuration bitstreams for the implementations having variations in timing that are reduced relative to the initial variations in timing. Another method comprises generating a plurality of implementations for the design; generating a cost function for the design based upon costs (e.g., collision penalties) derived from at least two of the plurality of implementations; determining a cost for each implementation based upon the cost function; optimizing an implementation of the design by minimizing the cost of the implementation; generating a plurality of configuration bitstreams for the plurality of implementations; and outputting the plurality of configuration bitstreams.
129 Citations
20 Claims
-
1. A method of implementing an integrated circuit using one of a plurality of configuration bitstreams for a design implemented in the integrated circuit, the method comprising:
-
generating, by a computer, a plurality of implementations of the design; analyzing the plurality of implementations of the design to determine initial variations in timing among the implementations; modifying at least one implementation of the plurality of implementations to reduce the variations in timing among the plurality of implementations; and outputting a plurality of configuration bitstreams for the plurality of implementations having variations in timing that are reduced relative to the initial variations in timing. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20)
-
Specification