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Methods of using one of a plurality of configuration bitstreams for an integrated circuit

  • US 7,853,916 B1
  • Filed: 10/11/2007
  • Issued: 12/14/2010
  • Est. Priority Date: 10/11/2007
  • Status: Active Grant
First Claim
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1. A method of implementing an integrated circuit using one of a plurality of configuration bitstreams for a design implemented in the integrated circuit, the method comprising:

  • generating, by a computer, a plurality of implementations of the design;

    analyzing the plurality of implementations of the design to determine initial variations in timing among the implementations;

    modifying at least one implementation of the plurality of implementations to reduce the variations in timing among the plurality of implementations; and

    outputting a plurality of configuration bitstreams for the plurality of implementations having variations in timing that are reduced relative to the initial variations in timing.

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