Diode with low resistance and high breakdown voltage

• US 7,855,413 B2
• Filed: 04/20/2007
• Issued: 12/21/2010
• Est. Priority Date: 08/30/2001
• Status: Active Grant

• Current Assignee: Shindengen Electric Manufacturing Company Limited
• Original Assignee: Shindengen Electric Manufacturing Company Limited
• Inventors: Sugai, Akihiko, Kunori, Shinji, Oshima, Kosuke, Kitada, Mizue, Kurosaki, Toru
• Primary Examiner(s): Nadav; Ori
• Application Number:
  US11/785,808
• Publication Number:
  US 20070194364A1
• Time in Patent Office: 1,341 Days
• Field of Search: 257/302, 257327-343, 257401-402, 438/259, 438270-271, 438/589
• US Class Current: 257/332
• CPC Class Codes: H01L 29/045 by their particular orientation of crystalline planes
• CPC Class Codes: H01L 29/0619 with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
• CPC Class Codes: H01L 29/0634 Multiple reduced surface field (multi-RESURF) structures, e.g. double RESURF, charge compensation, cool, superjunction (SJ), 3D-RESURF, composite buffer (CB) structures
• CPC Class Codes: H01L 29/66143 Schottky diodes
• CPC Class Codes: H01L 29/66348 with a recessed gate
• CPC Class Codes: H01L 29/7397 and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236
• CPC Class Codes: H01L 29/872 Schottky diodes

Abstract

A transistor and diode having a low resistance and a high breakdown voltage are provided. When the bottom portion of a narrow trench having the shape of a rectangular parallelepiped is filled with a semiconductor grown by epitaxial method, a {1 0 0} plane is exposed at the sidewalls of the narrow trench. The semiconductor is epitaxially grown at a constant rate on each sidewall of the narrow trench; thereby, creating a filling material with no voids present therein. The concentration and width of the filling material are optimized. This allows the portion located between the filling materials in a drain layer to be completely depleted when the filling material is completely depleted; thereby, making it possible to establish an electric field having a constant strength in the depletion layer extended in the drain layer.

Claims

1. A diode comprising:

a semiconductor substrate having single crystal structure of first conductivity type;

a principal semiconductor layer of a first conductivity type grown on a surface of said semiconductor substrate;

a narrow trench formed in the principal semiconductor layer, the narrow trench having a bottom and four sidewalls which are each a {100} oriented surface of the principal semiconductor layer;

a filling material having surfaces with same crystalline orientation as the surfaces of the principal semiconductor layer in contact with the filling material and being epitaxially grown on the bottom and four sidewalls of the narrow trench and doped with a dopant of a second conductivity type;

a Schottky electrode in contact with the principal semiconductor layer and with a surface of the filling material, the Schottky electrode forming a Schottky junction with the principal semiconductor layer and forming an ohmic contact to the filling material; and

an ohmic electrode formed on a back surface of the semiconductor substrate and forming ohmic contact to the semiconductor substrate.

2. The diode according to claim 1, wherein the Schottky junction and P-N junction between the filling material and the principal semiconductor layer are either both forward biased or both reverse biased when a voltage is applied to the Schottky electrode and the ohmic electrode.

3. The diode according to claim 2, wherein the diode comprises at least two filling materials according to claim 2;

and

a width and an impurity concentration of the filling material, and interval between the two adjacent filling materials and an impurity concentration of the principal semiconductor layer are set such that a depletion layer from a first filling material extends to a depletion layer from a second adjacent filling material when a voltage sufficient to completely deplete the filling material is applied.