Method for packaging semiconductor device and package structure thereof

• US 7,855,424 B2
• Filed: 11/30/2006
• Issued: 12/21/2010
• Est. Priority Date: 12/02/2005
• Status: Active Grant

• Current Assignee: Advanced Semiconductor Engineering Inc (ASE Technology Holding Co., Ltd.)
• Original Assignee: Advanced Semiconductor Engineering Inc (ASE Technology Holding Co., Ltd.)
• Inventors: Hsu, Chain-Hau
• Primary Examiner(s): Landau; Matthew C
• Assistant Examiner(s): Mitchell; James M
• Application Number:
  US11/606,085
• Publication Number:
  US 20070126075A1
• Time in Patent Office: 1,482 Days
• Field of Search: 257431-435, 438/116
• US Class Current: 257/431
• CPC Class Codes: B81C 1/00333 Aspects relating to packaging of MEMS devices, not covered by groups B81C1/00269 - B81C1/00325
• CPC Class Codes: B81C 2203/0118 Bonding a wafer on the substrate, i.e. where the cap consists of another wafer
• CPC Class Codes: B81C 2203/051 Active alignment, e.g. using internal or external actuators, magnets, sensors, marks or marks detectors
• CPC Class Codes: B81C 3/002 Aligning microparts
• CPC Class Codes: H01L 23/10 characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
• CPC Class Codes: H01L 24/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 25/0652 the devices being arranged next and on each other, i.e. mixed assemblies
• CPC Class Codes: H01L 27/14618 Containers
• CPC Class Codes: H01L 27/14683 Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof not peculiar thereto H01L21/00
• CPC Class Codes: H01L 2924/16195 Flat cap [not enclosing an internal cavity]
• CPC Class Codes: H01L 2924/16788 Glasses, e.g. amorphous oxides, nitrides or fluorides

Abstract

A method for packaging a semiconductor device includes following steps. First, a first substrate including at least one first pattern is provided. At least one semiconductor device is disposed on the surface of the first substrate. Next, a spacer with at least one aperture and at least one through hole is provided. Then, the first pattern is aimed at the through hole to connect the first substrate and the spacer, so that the semiconductor device is positioned correspondingly to the aperture. Afterwards, a second substrate including at least one second pattern is provided. Thereon, the second pattern is aimed at the through hole, so that the second substrate is connected to the spacer correspondingly.

Claims

1. A method for packaging an semiconductor device, the method comprising:

providing a first substrate, at least one semiconductor device disposed on a surface of the first substrate, the first substrate comprising at least one first pattern;

providing a spacer with at least one aperture and at least one through hole, wherein the through hole is smaller than the aperture;

connecting the first substrate and the spacer by aiming the first pattern at the through hole, so that the semiconductor device is positioned correspondingly to the aperture;

providing a second substrate comprising at least one second pattern; and

connecting the spacer and the second substrate by aiming the second pattern at the through hole.

2. The method according to claim 1, wherein the step of providing the spacer further comprises:

providing a wafer;

forming a patterned photoresist layer over the wafer; and

etching the wafer to form at least one aperture and at least one through hole according to the patterned photoresist layer.

3. The method according to claim 1, wherein the step of connecting the first substrate and the spacer further comprises:

focusing an image sensor on the region between the first substrate and the spacer;

adjusting the relative position of the first substrate and the spacer, so that the semiconductor device is disposed correspondingly to the aperture;

aiming the first pattern at the through hole by the image sensor; and

pressing the first substrate and the spacer to connect.

4. The method according to claim 3, wherein the image sensor is a charge coupled device (CCD).

5. The method according to claim 1, wherein the step of connecting the spacer and the second substrate further comprises:

focusing an image sensor at the region between the spacer and the second substrate;

adjusting the relative positions of the spacer and the second substrate;

aiming the second pattern at the through hole by the image sensor; and

pressing the spacer and the second substrate to connect.

6. The method according to claim 1, further comprising:

cutting the connected first substrate, the spacer and the second substrate to form a plurality of optical packages.

7. The method according to claim 1, wherein the semiconductor device is an optical device.

8. The method according to claim 1, wherein the second substrate is a glass substrate.

9. The method according to claim 1, wherein in the steps of providing the first substrate and providing the spacer, the through hole is smaller than the semiconductor device.

10. The method according to claim 1, wherein in the steps of providing the first substrate and providing the spacer, a plurality of semiconductor devices are disposed on the surface of the first substrate, the spacer has a plurality of apertures, and the quantity of the at least one through hole is less than the quantity of the apertures.

11. The method according to claim 1, wherein in the steps of providing the first substrate and providing the spacer, a plurality of semiconductor devices are disposed on the surface of the first substrate, and the quantity of the at least one through hole is less than the quantity of the semiconductor devices.

12. The method according to claim 1, wherein in the steps of providing the spacer, the aperture is disposed at a central area of the spacer, and the through hole is disposed at a marginal area of the spacer.

13. An semiconductor package, comprising:

a first substrate comprising at least one first pattern;

at least one semiconductor device disposed on the first substrate;

a spacer with at least one aperture and at least one through hole, the through hole being smaller than the aperture, the spacer connected to the first substrate, the aperture aimed at the semiconductor device, the first pattern aimed at the through hole; and

a second substrate disposed on the spacer, the second substrate comprising a second pattern corresponding to the through hole.

14. The semiconductor package according to claim 13, wherein the semiconductor device is an optical device.

15. The semiconductor package according to claim 13, wherein the second substrate is a glass substrate.

16. The semiconductor package according to claim 13, wherein the through hole is smaller than the semiconductor device.

17. The semiconductor package according to claim 13, wherein a plurality of semiconductor devices are disposed on the surface of the first substrate, the spacer has a plurality of apertures, and the quantity of the at least one through hole is less than the quantity of the apertures.

18. The semiconductor package according to claim 13, wherein a plurality of semiconductor devices are disposed on the surface of the first substrate, and the quantity of the at least one through hole is less than the quantity of the semiconductor devices.

19. The semiconductor package according to claim 13, wherein the aperture is disposed at a central area of the spacer, and the through hole is disposed at a marginal area of the spacer.

20. The semiconductor package according to claim 13, wherein a cross-section of the through hole is a rectangle.