Dual sensor system having fault detection capability
First Claim
1. A sensor system having fault detection capability comprising:
- a first transducer producing a first analog signal;
a second transducer producing a second analog signal, said first and second analog signals representing a parameter being independently sensed by both of said first and second transducers;
a subtraction circuit in communication with each of said first and second transducers for determining a difference between said first analog signal and said second analog signal to produce a difference signal;
a summing circuit in communication with each of said first and second transducers for adding said first analog signal and said second analog signal to produce a transducer output signal;
a first analog-to-digital converter (ADC) in communication with said subtraction circuit for receiving said difference signal and generating a corresponding digital difference signal indicative of a condition of said first and second transducers;
a processor in communication with said first ADC for generating a logical output signal in response to said digital difference signal indicative of said condition of said first and second transducers;
a second ADC in communication with said summing circuit, said second ADC receiving said transducer output signal and generating a digital transducer output signal indicative of said sensed parameter; and
an output in communication with each of said processor and said second ADC for concurrent provision of said logical output signal with said transducer output signal.
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Accused Products
Abstract
A sensor system (20) includes transducers (32, 34) each yielding an analog signal (37, 39) representing a parameter independently sensed by each of the transducers (32, 34). The signals (37, 39) are summed and the resulting transducer signal (46) is converted to a digital transducer signal (26) by a high resolution analog-to-digital converter (ADC) (48). Concurrently, one of the signals (37, 39) is subtracted from the other. The resulting difference signal (56) is converted to a digital difference signal (60) by a low resolution ADC (58). When the digital difference signal (60) is within a threshold window (78), a fault signal (28) indicates a normal condition (80) of the transducers (32, 34). When the signal (60) falls outside of the threshold window (78), a fault signal (28) indicates a fault condition (82) of the transducers. The transducer and fault signals (26, 28) are concurrently output from the sensor system (20).
15 Citations
12 Claims
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1. A sensor system having fault detection capability comprising:
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a first transducer producing a first analog signal; a second transducer producing a second analog signal, said first and second analog signals representing a parameter being independently sensed by both of said first and second transducers; a subtraction circuit in communication with each of said first and second transducers for determining a difference between said first analog signal and said second analog signal to produce a difference signal; a summing circuit in communication with each of said first and second transducers for adding said first analog signal and said second analog signal to produce a transducer output signal; a first analog-to-digital converter (ADC) in communication with said subtraction circuit for receiving said difference signal and generating a corresponding digital difference signal indicative of a condition of said first and second transducers; a processor in communication with said first ADC for generating a logical output signal in response to said digital difference signal indicative of said condition of said first and second transducers; a second ADC in communication with said summing circuit, said second ADC receiving said transducer output signal and generating a digital transducer output signal indicative of said sensed parameter; and an output in communication with each of said processor and said second ADC for concurrent provision of said logical output signal with said transducer output signal. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A method of fault detection in a device that includes a dual sensor system having first and second transducers that independently sense a parameter, said method comprising:
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producing a first analog signal at said first transducer; producing a second analog signal at said second transducer, said first and second analog signals representing said sensed parameter; subtracting said first analog signal from said second analog signal to produce a difference signal; summing said first and second analog signals to produce a transducer output signal; converting said difference signal to a digital difference signal indicative of a condition of said first and second transducers by utilizing a first analog-to-digital converter (ADC) to convert said difference signal to said digital difference signal, said ADC being characterized by a first resolution; converting said transducer output signal to a digital transducer output signal by utilizing a second ADC to convert said transducer output signal to said digital transducer output signal, said second ADC being characterized by a second resolution, said second resolution being greater than said first resolution; comparing said digital difference signal against a threshold value to determine whether said condition of said first and second transducers is one of a normal condition and a fault condition; and concurrently providing said digital transducer output and a logical output signal responsive to said digital difference signal to a downstream component of said device, said logical output signal informing said downstream component of said condition of said first and second transducers.
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8. A device comprising:
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a sensor system having fault detection capability, said sensor system including; a first transducer producing a first analog signal; a second transducer producing a second analog signal, said first and second analog signals representing a parameter being independently sensed by both of said first and second transducers; a subtraction circuit in communication with each of said first and second transducers for determining a difference between said first and second analog signals to produce a difference signal; a summing circuit in communication with each of said first and second transducers for adding said first analog signal and said second analog signal to produce an analog transducer signal; a first analog-to-digital converter (ADC) in communication with said subtraction circuit for generating a digital difference signal indicative of a condition of said first and second transducers from said analog difference signal, said first ADC being characterized by a first resolution; and a second ADC in communication with said summing circuit for generating a digital transducer output signal from said analog transducer signal, said second ADC being characterized by a second resolution, said second resolution being greater than said first resolution; and a downstream component in communication with said sensor system for receiving said digital transducer output signal and a signal indicative of said digital difference signal. - View Dependent Claims (9, 10, 11, 12)
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Specification