Circuit device to generate a high precision control signal

• US 7,855,669 B2
• Filed: 09/26/2008
• Issued: 12/21/2010
• Est. Priority Date: 09/26/2008
• Status: Active Grant

• Current Assignee: Skyworks Solutions Incorporated
• Original Assignee: Silicon Laboratories Incorporated
• Inventors: Gammel, John
• Primary Examiner(s): Cox; Cassandra
• Application Number:
  US12/238,484
• Publication Number:
  US 20100080336A1
• Time in Patent Office: 816 Days
• Field of Search: None
• US Class Current: 341/144
• CPC Class Codes: H03K 23/667 by switching the base during a counting cycle
• CPC Class Codes: H03M 1/68 with conversions of different sensitivity, i.e. one conversion relating to the more significant digital bits and another conversion to the less significant bits
• CPC Class Codes: H03M 1/822 using pulse width modulation

Abstract

In an embodiment, a circuit device includes a first counter responsive to a clock signal and to a first control word having a first precision. The counter produces a first control signal related to the first control word at a first output. The circuit device further includes a second counter responsive to the clock signal and to a second control word having the first precision. The second counter produces a second control signal related to the second control word at a second output. The circuit device also includes a filtering circuit responsive to the first output and the second output to receive the first and second control words. The filtering circuit is adapted to produce an output control signal related to the first and second control words, where the output control signal has a second precision that is greater than the first precision.

Claims

1. A circuit device comprising:

a first counter circuit responsive to a clock signal and to a first control word having a first precision to produce a first control signal related to the first control word at a first output;

a second counter circuit responsive to the clock signal and to a second control word having the first precision to produce a second control signal related to the second control word at a second output; and

a filtering circuit responsive to the first output and the second output, the filtering circuit adapted to produce an output signal related to the first and second control words, the output signal having a second precision that is greater than the first precision that would be obtained by filtering only the first or second output, the filtering circuit comprising;

a first resistor having a first resistance coupled between the first output and the output node; and

a second resistor having a second resistance coupled between the second output and the output node;

wherein the first resistance and the second resistance define a ratio related to the first precision.

2. The circuit device of claim 1, wherein the first and second counter circuits comprise programmable counter array circuits adapted to produce the first and second outputs having magnitudes that represent the first and second control words.

3. The circuit device of claim 1, wherein the first precision comprises an 8-bit precision and wherein the second precision comprises a 16-bit precision.

4. The circuit device of claim 1, wherein the first resistance and the second resistance are accurate to the first precision.

5. The circuit device of claim 1, wherein the ratio comprises a ratio of 256 to 1 when the first precision is 8-bits.

6. The circuit device of claim 1, further comprising a capacitor coupled to the output node.

7. A circuit device comprising:

a first counter circuit responsive to a clock signal and to a first control word having a first precision to produce a first control signal related to the first control word at a first output;

at least one second counter circuit responsive to the clock signal and to a respective at least one second control word having the first precision to provide a respective at least one second control signal related to the respective at least one second control word to at least one second output;

a filtering circuit responsive to the first output and to the at least one second output, the filtering circuit adapted to produce an output control signal related to the first control signal and the respective at least one second control signal, wherein the output control signal has a second precision that is greater than the first precision; and

a control logic circuit adapted to provide the first control word to the first counter circuit and to selectively provide the at least one second control word to the respective at least one second counter circuit.

8. The circuit device of claim 7, wherein the control logic circuit is adapted to selectively provide the at least one second control word to selectively adjust a linearity associated with the output control signal.

9. The circuit device of claim 8, wherein the at least one second counter circuit comprises a third counter circuit responsive to the clock signal, and wherein the control logic circuit is adapted to selectively provide a third control word to the third counter circuit.

10. The circuit device of claim 9, wherein the at least one second counter circuit comprises a second counter circuit and a third counter circuit, wherein the control circuit is adapted to provide a second control word to the second counter circuit and to selectively provide a third control word to the third counter circuit.

11. The circuit device of claim 10, wherein the third control word is selectively provided to the third counter circuit to adjust a bit-precision associated with the output signal.

12. A circuit device comprising:

a first programmable counter array (PCA) circuit responsive to a clock signal and adapted to receive a first control word having a first precision, the first PCA circuit adapted to produce a first output word based on the clock signal and having the first precision;

a second PCA circuit responsive to the clock signal and adapted to receive a second control word having a second precision, the second PCA circuit adapted to produce a second output signal based on the clock signal and having the second precision;

a filtering circuit adapted to responsive to the first and second PCA circuits and adapted to filter the first output word and the second output word to produce an output control signal at an output terminal, the output control signal having a third precision that is greater than the first and second precisions.

13. The circuit device of claim 12, further comprising a capacitor coupled to output terminal to filter the output signal.

14. The circuit device of claim 12, wherein the filtering circuit comprises:

a first resistor having a first resistance coupled between the first PCA circuit and the output terminal; and

a second resistor having a second resistance coupled between the second PCA circuit and the output terminal.

15. The circuit device of claim 14, wherein the first resistor has a first accuracy that corresponds to the first precision and wherein the second resistor has a second accuracy that corresponds to the second precision.

16. The circuit device of claim 14, wherein a ratio of the first resistance to the second resistance is related to the first precision.

17. The circuit device of claim 12, wherein the first precision and the second precision represent 8-bit precision and wherein the third precision comprises 16-bit precision.

18. The circuit device of claim 17, wherein the clock signal comprises a 25.6 MHz clock signal.