Systems and methods of sharing processing resources in a multi-threading environment

• US 7,856,636 B2
• Filed: 05/10/2005
• Issued: 12/21/2010
• Est. Priority Date: 05/10/2005
• Status: Expired due to Fees

• Current Assignee: Hewlett-Packard Development Company, L.P. (HP Inc.)
• Original Assignee: Hewlett-Packard Development Company, L.P. (HP Inc.)
• Inventors: Soltis, Don C. Jr., Bhatia, Rohit
• Primary Examiner(s): Bullock, Jr.; Lewis A
• Assistant Examiner(s): Huaracha; Willy W
• Application Number:
  US11/125,859
• Publication Number:
  US 20060259907A1
• Time in Patent Office: 2,051 Days
• Field of Search: 718/1, 718/100, 718/102, 718/104, 718/107, 718/108
• US Class Current: 718/108
• CPC Class Codes: G06F 9/526 Mutual exclusion algorithms

Abstract

Systems and methods of sharing processing resources in a multi-threading environment are disclosed. An exemplary method may include allocating a lock value for a resource lock, the lock value corresponding to a state of the resource lock. A first thread may yield at least a portion of the processing resources for another thread. The resource lock may be acquired for the first thread if the lock value indicates the resource lock is available.

Claims

1. A method of sharing processing resources in a multi-threading environment, comprising:

executing a first thread that requires access to a shared resource;

if the shared resource is unavailable to the first thread;

allocating a memory address with a lock value for the shared resource, wherein the memory address is associated with the first thread and the lock value indicates a state of the shared resource;

arming the first thread for a switching event on the allocated memory address;

yielding by the first thread at least a portion of the processing resources for a second thread that does not require access to the shared resource;

while the second thread uses the at least a portion of the processing resources, performing the steps of;

checking the lock value at the memory address by the logical processor in response to an occurrence of the switching event, wherein the switching event comprises updating, by a logical processor releasing the shared resource, the lock value for the shared resource;

if the lock value indicates the shared resource is available;

returning, by the second thread, the at least a portion of the processing resources to the first thread; and

acquiring by the logical processor the shared resource for the first thread.

2. The method of claim 1 further comprising checking the lock value in response to a switching event only if the first thread is armed.

3. The method of claim 1 further comprising checking the lock value in response to any switching event to reduce latency between releasing a lock for the shared resource and acquiring the resource lock for the first thread.

4. The method of claim 1 further comprising checking the lock value in response to predetermined switching events to reduce latency between releasing a lock for the shared resource and acquiring the resource lock for the first thread.

5. The method of claim 1 further comprising checking availability of the shared resource if the lock value indicates the shared resource is available.

6. The method of claim 1 further comprising maintaining an address table for each of a plurality of threads, wherein allocating the memory address of the lock value is in the address table for a yielding thread.

7. The method of claim 6 further comprising updating the lock value in the address table for each of the plurality of threads if the corresponding shared resource is released.

8. A system comprising:

a multi-threading processing unit;

a first logical processor executing a thread on the multi-threading processing unit, wherein the thread requires access to a shared resource;

if the shared resource is unavailable to the first thread, the first logical processor performing the steps of;

allocating a memory address with a state indicator for the shared resource, wherein the memory address is associated with the thread;

arming the thread for a switching event on the allocated memory address;

yielding the at least a portion of the processing resources for executing a second thread that does not require access to the shared resource;

checking the state indicator at the memory address in response to an occurrence of the switching event, wherein the switching event comprises updating, by a logical processor releasing the shared resource, the state indicator for the shared resource; and

if the state indicator indicates the shared resource is available;

a second logical processor returning the at least a portion of the processing resources from the second thread to the first logical processor; and

acquiring by the first logical processor the shared resource for the thread.

9. The system of claim 8 wherein the state indicator is allocated in an address table for the first logical processor.

10. The system of claim 9 wherein the multi-threading processing unit checks the state indicator for any change recorded in the address table for the first logical processor.

11. The system of claim 9 wherein the multi-threading processing unit only checks the state indicator for a change recorded in the address table for the first logical processor if the first logical processor is armed.

12. The system of claim 8 wherein the first logical processor continues to yield the at least a portion of processing resources until a lock is acquired for the shared resource.

13. A system for sharing processing resources in a multi-threading environment, comprising:

means for executing a first thread that requires access to a shared resource;

means for allocating a memory address with an indicator means for the shared resource if the shared resource is unavailable to the first thread, wherein the memory address is associated with the first thread;

means for arming the first thread for a switching event on the allocated memory address;

means for causing the first thread to yield at least a portion of the processing resources for a second thread that does not require access to the shared resource;

means for invalidating the indicator means if the shared resource is released;

means for checking the indicator means at the memory address in response to an occurrence of the switching event,

means for returning the at least a portion of the processing resources to the first thread if the lock value indicates the shared resource is available; and

means for acquiring the shared resource for the first thread.

14. The system of claim 13 further comprising means for checking the indicator means in response to any switching event to reduce latency between releasing the resource lock and acquiring the resource lock for the first thread.