Microelectromechanical device including an encapsulation layer of which a portion is removed to expose a substantially planar surface having a portion that is disposed outside and above a chamber and including a field region on which integrated circuits are formed and methods for fabricating same

• US 7,859,067 B2
• Filed: 09/18/2007
• Issued: 12/28/2010
• Est. Priority Date: 06/04/2003
• Status: Active Grant

• Current Assignee: Robert Bosch GmbH
• Original Assignee: Robert Bosch GmbH
• Inventors: Partridge, Aaron, Lutz, Markus, Kronmueller, Silvia
• Primary Examiner(s): Nguyen; Kimberly D.
• Assistant Examiner(s): Payen; Marvin
• Application Number:
  US11/901,826
• Publication Number:
  US 20080237756A1
• Time in Patent Office: 1,197 Days
• Field of Search: 257414-420, 257/787, 257/788, 257/790, 257/E21.002, 257/E23.194, 438/51
• US Class Current: 257/415
• CPC Class Codes: B81B 2207/015 the micromechanical device and the control or processing electronics being integrated on the same substrate
• CPC Class Codes: B81C 1/00261 Processes for packaging MEMS devices MEMS packages B81B7/0032, packaging of smart-MEMS B81C1/0023
• CPC Class Codes: B81C 1/00301 Connecting electric signal lines from the MEMS device with external electrical signal lines, e.g. through vias
• CPC Class Codes: B81C 2201/0176 Chemical vapour Deposition
• CPC Class Codes: B81C 2203/0136 Growing or depositing of a covering layer
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

There are many inventions described and illustrated herein. In one aspect, the present invention is directed to a MEMS device, and technique of fabricating or manufacturing a MEMS device, having mechanical structures encapsulated in a chamber prior to final packaging. The material that encapsulates the mechanical structures, when deposited, includes one or more of the following attributes: low tensile stress, good step coverage, maintains its integrity when subjected to subsequent processing, does not significantly and/or adversely impact the performance characteristics of the mechanical structures in the chamber (if coated with the material during deposition), and/or facilitates integration with high-performance integrated circuits. In one embodiment, the material that encapsulates the mechanical structures is, for example, silicon (polycrystalline, amorphous or porous, whether doped or undoped), silicon carbide, silicon-germanium, germanium, or gallium-arsenide.

Claims

1. A microelectromechanical device, comprising:

a substrate;

a chamber;

a micromachined mechanical structure at least partially disposed in the chamber;

a first encapsulation layer comprising a permeable material having a plurality of pores; and

a second encapsulation layer comprising a semiconductor material disposed over the first encapsulation layer and sealing the chamber by filling the plurality of pores;

wherein;

the first encapsulation layer is disposed over both the micromachined mechanical structure and the substrate;

the first encapsulation layer forms at least a portion of a wall of the chamber;

the first encapsulation layer comprises a polycrystalline semiconductor material doped with a first impurity with a first conductivity type;

the semiconductor material of the second encapsulation layer is doped with a second impurity with a second conductivity type;

the first conductivity type is different than the second conductivity type;

a portion of the second encapsulation layer having been removed to expose a substantially planar surface;

the substantially planar surface is adapted to provide a base upon which integrated circuits are formed; and

a first portion of the substantially planar surface is disposed outside and above the chamber and includes a field region comprising a monocrystalline material and upon which the integrated circuits are formed.

2. The microelectromechanical device of claim 1, wherein the field region comprises a monocrystalline semiconductor material.

3. The microelectromechanical device of claim 2, wherein the integrated circuits comprise data processing electronics.

4. The microelectromechanical device of claim 1, further comprising a contact at least partially disposed outside the chamber to electrically couple the micromachined mechanical structure to the integrated circuits, interface circuitry, or external devices.

5. The microelectromechanical device of claim 4, wherein the contact comprises a semiconductor material doped with an impurity to provide increased electrical conductivity.

6. The microelectromechanical device of claim 4, further comprising an insulation layer disposed on at least a portion of the second encapsulation layer and including an opening over the contact, and an electrically conductive material disposed within the opening over the contact and on at least a portion of the insulation layer.

7. The microelectromechanical device of claim 1, wherein each of the first encapsulation layer and the second encapsulation layer comprises silicon, germanium, silicon/germanium, silicon carbide, or gallium arsenide.

8. The microelectromechanical device of claim 1, further comprising a third encapsulation layer disposed over the second encapsulation layer.

9. The microelectromechanical device of claim 8, wherein the third encapsulation layer comprises an insulating or metal material.

10. A microelectromechanical device, comprising:

a substrate;

a chamber;

a micromachined mechanical structure at least partially disposed in the chamber;

a first encapsulation layer comprising a material having a plurality of vents; and

a second encapsulation layer comprising a semiconductor material disposed over the first encapsulation layer and sealing the chamber by filling the plurality of vents;

wherein;

the first encapsulation layer is disposed over both the micromachined mechanical structure and the substrate;

the first encapsulation layer forms at least a portion of a wall of the chamber;

the first encapsulation layer comprises a polycrystalline semiconductor material doped with a first impurity with a first conductivity type;

the semiconductor material of the second encapsulation layer is doped with a second impurity with a second conductivity type;

the first conductivity type is different than the second conductivity type;

a portion of the second encapsulation layer having been removed to expose a substantially planar surface;

the substantially planar surface is adapted to provide a base upon which integrated circuits are formed; and

a first portion of the substantially planar surface is disposed outside and above the chamber and includes a field region comprising a monocrystalline material and upon which the integrated circuits are formed.

11. The microelectromechanical device of claim 10, wherein the field region comprises a monocrystalline semiconductor material.

12. The microelectromechanical device of claim 11, wherein the integrated circuits comprise data processing electronics.

13. The microelectromechanical device of claim 10, further comprising a contact at least partially disposed outside the chamber to electrically couple the micromachined mechanical structure to the integrated circuits, interface circuitry, or external devices.

14. The microelectromechanical device of claim 13, wherein the contact comprises a semiconductor material doped with an impurity to provide increased electrical conductivity.

15. The microelectromechanical device of claim 13, further comprising an insulation layer disposed on at least a portion of the second encapsulation layer and including an opening over the contact, and an electrically conductive material disposed within the opening over the contact and on at least a portion of the insulation layer.

16. The microelectromechanical device of claim 10, wherein each of the first encapsulation layer and the second encapsulation layer comprises silicon, germanium, silicon/germanium, silicon carbide, or gallium arsenide.

17. The microelectromechanical device of claim 10, further comprising a third encapsulation layer disposed over the second encapsulation layer.

18. The microelectromechanical device of claim 17, wherein the third encapsulation layer comprises an insulating or metal material.

19. A method of manufacturing a microelectromechanical device, the method comprising:

forming a micromachined mechanical structure on top of a substrate;

providing a sacrificial layer over the micromachined mechanical structure;

disposing a first encapsulation layer over the sacrificial layer, the micromachined mechanical structure, and the substrate, wherein the first encapsulation layer comprises a permeable material having a plurality of pores;

removing the sacrificial layer through the plurality of pores to release at least a portion of the micromachined mechanical structure, thereby forming a chamber;

disposing a second encapsulation layer over the first encapsulation layer to fill the plurality of pores, thereby sealing the chamber;

removing a portion of the second encapsulation layer to expose a substantially planar surface; and

forming integrated circuits on the substantially planar surface;

wherein;

at least a portion of the micromachined mechanical structure is disposed in the chamber;

the first encapsulation layer forms at least a portion of a wall of the chamber;

the first encapsulation layer comprises a polycrystalline semiconductor material doped with a first impurity with a first conductivity type;

the second encapsulation layer comprises a semiconductor material that is doped with a second impurity with a second conductivity type;

the first conductivity type is different than the second conductivity type; and

a first portion of the substantially planar surface is disposed outside and above the chamber and includes a field region comprising a monocrystalline material and upon which the integrated circuits are formed.

20. The method of claim 19, wherein the micromachined mechanical structure is disposed over the substrate or formed from at least a portion of the substrate.

21. The method of claim 19, further comprising the steps of:

doping the semiconductor material of the first encapsulation layer with the first impurity with the first conductivity type; and

doping the semiconductor material of the second encapsulation layer with the second impurity with the second conductivity type.

22. The method of claim 19, wherein a chemical mechanical polishing technique is used to remove the portion of the second encapsulation layer to expose the substantially planar surface.

23. The method of claim 19, wherein the monocrystalline material of the field region is a semiconductor material.

24. The method of claim 23, wherein the integrated circuits comprise data processing electronics.

25. The method of claim 19, further comprising the step of forming a contact to electrically couple the micromachined mechanical structure to the integrated circuits, interface circuitry, or external devices, wherein the contact is at least partially disposed outside the chamber.

26. The method of claim 25, wherein the contact comprises a semiconductor material, and the method further comprises the step of doping the semiconductor material of the contact with an impurity to provide increased electrical conductivity.

27. The method of claim 25, further comprising the steps of:

disposing an insulation layer on at least a portion of the second encapsulation layer;

forming an opening in the insulation layer over the contact; and

disposing an electrically conductive material within the opening over the contact and on at least a portion of the insulation layer.

28. The method of claim 19, wherein each of the first encapsulation layer and the second encapsulation layer comprises silicon, germanium, silicon/germanium, silicon carbide, or gallium arsenide.

29. The method of claim 19, further comprising the step of disposing a third encapsulation layer over the second encapsulation layer.

30. The method of claim 29, wherein the third encapsulation layer comprises an insulating or metal material.

31. A method of manufacturing a microelectromechanical device, the method comprising:

forming a micromachined mechanical structure on top of a substrate;

providing a sacrificial layer over the micromachined mechanical structure;

disposing a first encapsulation layer over the sacrificial layer, the micromachined mechanical structure, and the substrate;

forming a plurality of vents in the first encapsulation layer;

removing the sacrificial layer through the plurality of vents to release at least a portion of the micromachined mechanical structure, thereby forming a chamber;

disposing a second encapsulation layer over the first encapsulation layer to fill the plurality of vents, thereby sealing the chamber;

removing a portion of the second encapsulation layer to expose a substantially planar surface; and

forming integrated circuits on the substantially planar surface;

wherein;

at least a portion of the micromachined mechanical structure is disposed in the chamber;

the first encapsulation layer forms at least a portion of a wall of the chamber;

the first encapsulation layer comprises a polycrystalline semiconductor material doped with a first impurity with a first conductivity type;

the second encapsulation layer comprises a semiconductor material that is doped with a second impurity with a second conductivity type;

the first conductivity type is different than the second conductivity type; and

a first portion of the substantially planar surface is disposed outside and above the chamber and includes a field region comprising a monocrystalline material and upon which the integrated circuits are formed.

32. The method of claim 31, wherein the micromachined mechanical structure is disposed over the substrate or formed from at least a portion of the substrate.

33. The method of claim 31, further comprising the steps of:

doping the semiconductor material of the first encapsulation layer with the first impurity with the first conductivity type; and

doping the semiconductor material of the second encapsulation layer with the second impurity with the second conductivity type.

34. The method of claim 31, wherein a chemical mechanical polishing technique is used to remove the portion of the second encapsulation layer to expose the substantially planar surface.

35. The method of claim 31, wherein the monocrystalline material of the field region is a semiconductor material.

36. The method of claim 35, wherein the integrated circuits comprise data processing electronics.

37. The method of claim 31, further comprising the step of forming a contact to electrically couple the micromachined mechanical structure to the integrated circuits, interface circuitry, or external devices, wherein the contact is at least partially disposed outside the chamber.

38. The method of claim 37, wherein the contact comprises a semiconductor material, and the method further comprises the step of doping the semiconductor material of the contact with an impurity to provide increased electrical conductivity.

39. The method of claim 37, further comprising the steps of:

disposing an insulation layer on at least a portion of the second encapsulation layer;

forming an opening in the insulation layer over the contact; and

disposing an electrically conductive material within the opening over the contact and on at least a portion of the insulation layer.

40. The method of claim 31, wherein each of the first encapsulation layer and the second encapsulation layer comprises silicon, germanium, silicon/germanium, silicon carbide, or gallium arsenide.

41. The method of claim 31, further comprising the step of disposing a third encapsulation layer over the second encapsulation layer.

42. The method of claim 41, wherein the third encapsulation layer comprises an insulating or metal material.