Fabric-backplane enterprise servers with VNICs and VLANs
First Claim
1. A method of transmitting data over a switching fabric from a symmetric multiprocessor having a memory, the method comprising:
- managing a plurality of transmit queues organized as a plurality of logical network interfaces, each transmit queue referencing a corresponding respective plurality of transmit buffers in the memory, the managing performed at least in part by at least one network interface driver process executing on the symmetric multiprocessor;
assigning a media access control address that is shared by each transmit queue within each logical network interface;
storing the data into the transmit buffers by at least one application process executing on the symmetric multiprocessor;
within egress logic, scheduling processing of the transmit queues;
via a bus interface of the egress logic, reading the data into the egress logic in accordance with the scheduling;
within the egress logic, providing cells to an included fabric interface in accordance with selective groupings of the data, each cell including a fabric egress port address corresponding to a destination network address of each data grouping and the fabric egress port address further corresponding to a physical fabric egress port of the fabric; and
via the fabric interface, sending the cells to the fabric.
4 Assignments
0 Petitions
Accused Products
Abstract
Virtual Network Interface Controllers (vNICs) provide for communication among modules of Enterprise Server (ES) embodiments via a switch fabric dataplane. Processes executing on compute complexes of the servers exchange data as packets or messages by interfaces made available through vNICs. The vNICs further provide for transparent communication with network and storage interfaces. vNIC provisioning capabilities include programmable bandwidth, priority scheme selection, and detailed priority control (such as round-robin weights). In some embodiments, vNICs are implemented in Virtual Input/Output Controllers (VIOCs). In another aspect, Virtual Local Area Networks (VLANs) enable access to layer-2 and selected layer-3 network functions while exchanging the packets and messages. VLAN identification is provided in each vNIC, and VLAN processing is partially performed in VIOCs implementing vNICs. The compute complexes and interfaces are typically configured as pluggable modules inserted into a backplane included in a chassis.
304 Citations
26 Claims
-
1. A method of transmitting data over a switching fabric from a symmetric multiprocessor having a memory, the method comprising:
-
managing a plurality of transmit queues organized as a plurality of logical network interfaces, each transmit queue referencing a corresponding respective plurality of transmit buffers in the memory, the managing performed at least in part by at least one network interface driver process executing on the symmetric multiprocessor; assigning a media access control address that is shared by each transmit queue within each logical network interface; storing the data into the transmit buffers by at least one application process executing on the symmetric multiprocessor; within egress logic, scheduling processing of the transmit queues; via a bus interface of the egress logic, reading the data into the egress logic in accordance with the scheduling; within the egress logic, providing cells to an included fabric interface in accordance with selective groupings of the data, each cell including a fabric egress port address corresponding to a destination network address of each data grouping and the fabric egress port address further corresponding to a physical fabric egress port of the fabric; and via the fabric interface, sending the cells to the fabric. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13)
-
-
14. An apparatus for transmitting data over a switching fabric from a symmetric multiprocessor having a memory, the apparatus comprising:
-
means for organizing a plurality of transmit queues as a plurality of logical network interfaces, each transmit queue referencing a corresponding respective plurality of transmit buffers in the memory; wherein the transmit queues are managed by at least one network interface driver process executing on the symmetric multiprocessor, each transmit queue within each logical network interface shares a media access control address assignment, and the data is stored into the transmit buffers by at least one application process executing on the symmetric multiprocessor; egress logic comprising a bus interface, a fabric interface, means for scheduling processing of the transmit queues, means for reading the data into the egress logic via the bus interface in accordance with the processing, means for providing cells to the fabric interface in accordance with selective groupings of the data, and means for sending the cells to the fabric via the fabric interface; and wherein each cell comprises a fabric egress port address corresponding to a destination network address of each data grouping and the fabric egress port address further corresponds to a physical fabric egress port of the fabric. - View Dependent Claims (15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26)
-
Specification