Decoding apparatus and decoding method
First Claim
1. A decoding apparatus for decoding channel input bits from a partial-response channel output in accordance with a trellis obtained by combining a coding constraint and state transitions of a partial response for a case in which the length of a memory required for describing said coding constraint is greater than the length of a channel memory of said partial response, said decoding apparatus comprising:
- a first calculation unit configured to carry out a first calculation on first branch information, which is defined as information on first branches included in three or more branches merging in a state determined in advance, and first path information defined as information on first paths for said first branches;
a second calculation unit configured to carry out a second calculation on a first calculation value obtained as a result of said first calculation; and
a third calculation unit configured to carry out said second calculation on second path information defined as information on second paths for second branches included in said three or more branches merging in said state determined in advance as branches having the same branch information,in which said third calculation unit is configured to carry out said second calculation prior to a predetermined time of processing carried out by said first and second calculation units.
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Abstract
Disclosed herein is a decoding apparatus for decoding channel input bits from a partial-response channel output in accordance with a trellis obtained by combining a coding constraint and state transitions of a partial response for a case in which the length of a memory required for describing the coding constraint is greater than the length of a channel memory of the partial response. The apparatus may include a first calculation unit configured to carry out a first calculation on first branch information, which may be defined as information on first branches included in three or more branches merging in a state determined in advance, and first path information defined as information on first paths for the first branches; and a second calculation unit configured to carry out a second calculation on a first calculation value obtained as a result of the first calculation.
9 Citations
7 Claims
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1. A decoding apparatus for decoding channel input bits from a partial-response channel output in accordance with a trellis obtained by combining a coding constraint and state transitions of a partial response for a case in which the length of a memory required for describing said coding constraint is greater than the length of a channel memory of said partial response, said decoding apparatus comprising:
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a first calculation unit configured to carry out a first calculation on first branch information, which is defined as information on first branches included in three or more branches merging in a state determined in advance, and first path information defined as information on first paths for said first branches; a second calculation unit configured to carry out a second calculation on a first calculation value obtained as a result of said first calculation; and a third calculation unit configured to carry out said second calculation on second path information defined as information on second paths for second branches included in said three or more branches merging in said state determined in advance as branches having the same branch information, in which said third calculation unit is configured to carry out said second calculation prior to a predetermined time of processing carried out by said first and second calculation units. - View Dependent Claims (4, 5, 6)
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2. A decoding apparatus for decoding channel input bits from a partial-response channel output in accordance with a trellis obtained by combining a coding constraint and state transitions of a partial response for a case in which the length of a memory required for describing said coding constraint is greater than the length of a channel memory of said partial response, said decoding apparatus comprising:
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a first calculation unit configured to carry out a first calculation on first branch information, which is defined as information on first branches included in three or more branches merging in a state determined in advance, and first path information defined as information on first paths for said first branches; a second calculation unit configured to carry out a second calculation on a first calculation value obtained as a result of said first calculation; and a third calculation unit configured to carry out said second calculation on second path information defined as information on second paths for second branches included in said three or more branches merging in said state determined in advance as branches having the same branch information, wherein; said first branch information includes second branch information, which is defined as information on said second branches, and third branch information defined as information on third branches included in said branches merging in said state determined in advance as branches other than said second branches; said first path information includes a third calculation value obtained as a result of said second calculation carried out by said third calculation unit and third path information defined as information on third paths for said third branches; said first calculation unit carries out said first calculation on said first branch information and said third calculation value as well as said third branch information and said third path information; and said third calculation unit carries out said second calculation prior to a predetermined time of processing carried out by said first and second calculation units.
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3. A decoding apparatus for decoding channel input bits from a partial-response channel output in accordance with a trellis obtained by combining a coding constraint and state transitions of a partial response for a case in which the length of a memory required for describing said coding constraint is greater than the length of a channel memory of said partial response, said decoding apparatus comprising:
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a first calculation unit configured to carry out a first calculation on first branch information, which is defined as information on first branches included in three or more branches merging in a state determined in advance, and first path information defined as information on first paths for said first branches; and a second calculation unit configured to carry out a second calculation on a first calculation value obtained as a result of said first calculation, wherein said first branches are defined as branches merging in each of states obtained as a result of splitting a predetermined state in which three or more branches merge so that the number of aforementioned first branches merging in each of said states obtained as a result of splitting said predetermined state is smaller than the number of branches merging in said predetermined state.
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7. A decoding method to be adopted in a decoding apparatus for decoding channel input bits from a partial-response channel output in accordance with a trellis obtained by combining a coding constraint and state transitions of a partial response for a case in which the length of a memory required for describing said coding constraint is greater than the length of a channel memory of said partial response, said decoding method comprising:
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carrying out a first calculation by use of a first calculation unit on first branch information, which is defined as information on first branches included in three or more branches merging in a state determined in advance, and first path information defined as information on first paths for said first branches; carrying out a second calculation by use of a second calculation unit on a first calculation value obtained as a result of said first calculation; and carrying out said second calculation by use of a third calculation unit on second path information defined as information on second paths for second branches included in said three or more branches merging in said state determined in advance as branches having the same branch information, in which said third calculation unit is configured to carry out said second calculation prior to a predetermined time of processing carried out by said first and second calculation units.
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Specification