Display device

• US 7,863,618 B2
• Filed: 11/02/2009
• Issued: 01/04/2011
• Est. Priority Date: 09/04/1996
• Status: Expired due to Fees

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Zhang, Hongyong, Teramoto, Satoshi
• Primary Examiner(s): Parker; Kenneth A
• Assistant Examiner(s): Ho; Anthony
• Application Number:
  US12/610,450
• Publication Number:
  US 20100044714A1
• Time in Patent Office: 428 Days
• Field of Search: 257/40, 257/59, 257/72, 257/E27.001, 257/E27.111, 349/44, 349/110, 349/111
• US Class Current: 257/59
• CPC Class Codes: G02F 1/136209 Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
• CPC Class Codes: G02F 1/136213 Storage capacitors associated with the pixel electrode
• CPC Class Codes: G02F 1/136227 Through-hole connection of the pixel electrode to the active element through an insulation layer

Abstract

The present invention provides an active matrix type display device having a high aperture ratio and a required auxiliary capacitor. A source line and a gate line are overlapped with part of a pixel electrode. This overlapped region functions to be a black matrix. Further, an electrode pattern made of the same material as the pixel electrode is disposed to form the auxiliary capacitor by utilizing the pixel electrode. It allows a required value of auxiliary capacitor to be obtained without dropping the aperture ratio. Also, it allows the electrode pattern to function as a electrically shielding film for suppressing the cross-talk between the source and gate lines and the pixel electrode.

Claims

1. A semiconductor device comprising:

at least one thin film transistor formed over a substrate, the thin film transistor having an active layer comprising at least channel, source, and drain regions;

at least one inorganic interlayer insulating film formed over the thin film transistor;

at least one interlayer insulating film formed on the inorganic interlayer insulating film, the interlayer insulating film comprising organic material and having a flattened surface;

a source line formed on the interlayer insulating film comprising organic material, the source line overlapping with a contact portion in the source region of the thin film transistor;

an electrode pattern covering and extending along the source line, the electrode pattern comprising a first layer and a second layer; and

a pixel electrode formed over the electrode pattern and connected to the drain region of the thin film transistor.

2. A device according to claim 1, wherein the interlayer insulating film having the flattened surface comprises organic material.

3. A device according to claim 1, wherein the first layer comprises metal and the second layer comprises a transparent material.

4. A device according to claim 1, wherein the first layer comprises one of Ti and Cr.

5. A device according to claim 1, wherein the second layer comprises ITO.

6. A device according to claim 1, wherein an auxiliary capacitor is formed between the electrode pattern and the pixel electrode.

7. A device according to claim 1, wherein the pixel electrode comprises a transparent material.

8. A device according to claim 1, wherein end portions of the pixel electrode overlap the source and gate lines with the electrode pattern interposed therebetween.

9. A device according to claim 1, wherein the thin film transistor comprises at least two channel regions.

10. A device according to claim 1, wherein a contact portion in the source region does not overlap with the pixel electrode.

11. A semiconductor device comprising:

at least one thin film transistor formed over a substrate, the thin film transistor having an active layer comprising at least channel, source, and drain regions;

at least one inorganic interlayer insulating film formed over the thin film transistor;

a first interlayer insulating film having a flattened surface formed on the inorganic interlayer insulating film;

source and gate lines intersecting each other and connected to the thin film transistor, the source line formed on the first interlayer insulating film and overlapping with a contact portion in the source region of the thin film transistor;

a second interlayer insulating film having a flattened surface formed on the first interlayer insulating film;

an electrode pattern extending along the source and gate lines, wherein the electrode pattern comprising a first layer and a second layer; and

a pixel electrode formed over the electrode pattern and connected to the drain region of the thin film transistor.

12. A device according to claim 11, wherein the first and second interlayer insulating films, each having the flattened surface, comprise organic material.

13. A device according to claim 11, wherein the first layer comprises metal and the second layer comprises a transparent material.

14. A device according to claim 11, wherein the first layer comprises one of Ti and Cr.

15. A device according to claim 11, wherein the second layer comprises ITO.

16. A device according to claim 11, wherein an auxiliary capacitor is formed between the electrode pattern and the pixel electrode.

17. A device according to claim 11, wherein the pixel electrode comprises a transparent material.

18. A device according to claim 11, wherein end portions of the pixel electrode overlap the source and gate lines with the electrode pattern interposed therebetween.

19. A device according to claim 11, wherein the thin film transistor comprises at least two channel regions.

20. A device according to claim 11, wherein a contact portion in the source region does not overlap with the pixel electrode.

21. A semiconductor device comprising:

at least one thin film transistor formed over a substrate, the thin film transistor having an active layer comprising at least channel, source, and drain regions;

at least one gate insulating film over the active layer;

at least one inorganic interlayer insulating film formed over the thin film transistor;

a first interlayer insulating film having a flattened surface formed on the inorganic interlayer insulating film;

source and gate lines intersecting each other and connected to the thin film transistor, the source line formed on the first interlayer insulating film and overlapping with a contact portion in the source region of the thin film transistor;

a second interlayer insulating film having a flattened surface formed on the first interlayer insulating film;

an electrode pattern covering and extending along the source and gate lines, wherein the electrode pattern comprising a first layer and a second layer; and

a pixel electrode formed over the electrode pattern and connected to the drain region of the thin film transistor.

22. A device according to claim 21, wherein the first and second interlayer insulating films, each having the flattened surface, comprise organic material.

23. A device according to claim 21, wherein the first layer comprises metal and the second layer comprises a transparent material.

24. A device according to claim 21, wherein the first layer comprises one of Ti and Cr.

25. A device according to claim 21, wherein the second layer comprises ITO.

26. A device according to claim 21, wherein an auxiliary capacitor formed between the electrode pattern and the pixel electrode.

27. A device according to claim 21, wherein the pixel electrode comprises a transparent material.

28. A device according to claim 21, wherein end portions of the pixel electrode overlap the source and gate lines with the electrode pattern interposed therebetween.

29. A device according to claim 21, wherein the thin film transistor comprises at least two channel regions.

30. A device according to claim 21, wherein a contact portion in the source region does not overlap with the pixel electrode.

31. A semiconductor device comprising:

at least one thin film transistor formed over a substrate, the thin film transistor having an active layer comprising at least channel, source, and drain regions;

at least one gate insulating film over the active layer;

at least one inorganic interlayer insulating film formed over the thin film transistor;

a first interlayer insulating film having a flattened surface formed on the inorganic interlayer insulating film;

source and gate lines intersecting each other and connected to the thin film transistor, the source line formed on the first interlayer insulating film and overlapping with a contact portion in the source region of the thin film transistor;

a second interlayer insulating film having a flattened surface formed on the first interlayer insulating film;

an electrode pattern covering and extending along the source and gate lines, wherein the electrode pattern comprising a first layer and a second layer; and

a pixel electrode formed over the electrode pattern and connected to the drain region of the thin film transistor,

wherein the electrode pattern covers an intersection of the source and gate lines.

32. A device according to claim 31, wherein the first and second interlayer insulating films, each having the flattened surface, comprise organic material.

33. A device according to claim 31, wherein the first layer comprises metal and the second layer comprises a transparent material.

34. A device according to claim 31, wherein the first layer comprises one of Ti and Cr.

35. A device according to claim 31, wherein the second layer comprises ITO.

36. A device according to claim 31, wherein an auxiliary capacitor formed between the electrode pattern and the pixel electrode.

37. A device according to claim 31, wherein the pixel electrode comprises a transparent material.

38. A device according to claim 31, wherein end portions of the pixel electrode overlap the source and gate lines with the electrode pattern interposed therebetween.

39. A device according to claim 31, wherein the thin film transistor comprises at least two channel regions.

40. A device according to claim 31, wherein a contact portion in the source region does not overlap with the pixel electrode.