Balancing current drawn from multiple power supply inputs using multiple-input inductors

• US 7,863,772 B2
• Filed: 06/01/2006
• Issued: 01/04/2011
• Est. Priority Date: 06/01/2006
• Status: Active Grant

• Current Assignee: Analog Devices International Unlimited Company (Analog Devices, Inc.)
• Original Assignee: Linear Technology Corporation (Analog Devices, Inc.)
• Inventors: Dwelley, David McLean, Bell, David Bundy
• Primary Examiner(s): RUTLAND WALLIS, MICHAEL
• Application Number:
  US11/444,400
• Publication Number:
  US 20070281754A1
• Time in Patent Office: 1,678 Days
• Field of Search: 307/43, 307/14, 307/19, 307/20
• US Class Current: 307/19
• CPC Class Codes: H02M 3/285 Single converters with a plurality of output stages connected in parallel parallel operation of a plurality of converters in dc distribution networks H02J1/10
• CPC Class Codes: H04L 12/10 Current supply arrangements

Abstract

Novel techniques for balancing current drawn from multiple power supply inputs. A multiple-input inductor is coupled between the power supply inputs and the switching circuits associated with the respective power supply inputs for balancing voltages applied to each of the switching circuits.

Claims

1. A power supply circuit comprising:

multiple power supply inputs including first and second power supply inputs for respectively receiving first and second input voltages,

multiple switching regulators associated with the respective power supply inputs, and

a first multiple-input inductor coupled between the power supply inputs and the switching regulators for balancing voltages applied to each of the switching regulators, the first multiple-input inductor having first and second windings respectively connected to the first and second power supply inputs for respectively receiving the first and second input voltages, so as to provide respective voltages of opposite polarities across the first and second windings.

2. The circuit of claim 1, wherein the first multiple-input inductor is configured for drawing equal amounts of current from the multiple power supply inputs.

3. The circuit of claim 1, wherein the multiple switching regulators are controlled to maintain a common switching duty cycle for all of the switching regulators.

4. The circuit of claim 1, wherein input currents drawn from the power supply inputs are maintained at a predetermined ratio.

5. The circuit of claim 1, wherein the multiple power supply inputs further include third power supply input, and the multiple switching regulators include first, second and third switching regulators respectively coupled to the first, second and third power supply inputs.

6. The circuit of claim 5, wherein the first multiple-input inductor is coupled between the first and second power supply inputs, and the first and the second switching regulators;

and a second multiple-input inductor is coupled between the second and third power supply inputs, and the second and third switching regulators.

7. The circuit of claim 6, wherein the second power supply input is configured as a master input, and the first and third power supply inputs are configured to provide input signals matching an input signal at the second power supply input.

8. The circuit of claim 5, wherein the first multiple input inductor is coupled between the first and second power supply inputs, and the first and second switching regulators;

a second multiple-input inductor is coupled between the second and third power supply inputs, and the second and third switching regulators; and

a third multiple-input inductor is coupled between the first and third power supply inputs, and the first and third switching regulators.

9. The circuit of claim 1, wherein the power supply inputs share a common ground.

10. The circuit of claim 1, wherein the power supply inputs are electrically isolated from each other.

11. The circuit of claim 1, wherein the power supply inputs share a common supply and use separate grounds.

12. The circuit of claim 1, wherein the switching regulators have a flyback configuration.

13. The circuit of claim 1, wherein the switching regulators have a buck configuration.

14. The circuit of claim 1, wherein the switching regulators have a boost configuration.

15. The circuit of claim 1, wherein each of the switching regulators includes a transformer.

16. The circuit of claim 1, wherein each of the switching regulators includes an inductor.

17. The circuit of claim 1, wherein the switching regulators are configured to provide a single power supply output of the power supply circuit.

18. The circuit of claim 1, wherein the switching regulators are configured to provide multiple power supply outputs of the power supply circuit.

19. A method of balancing current drawn from multiple power supply inputs including first and second power supply inputs for respectively receiving first and second input voltages, comprising the steps of:

converting voltages supplied from the power supply inputs using respective switching regulators, and

balancing voltages applied to the switching regulators from the power supply inputs using a multiple-input inductor having first and second windings respectively connected to the first and second power supply inputs for respectively receiving the first and second input voltages, so as to provide respective voltages of opposite polarities across the first and second windings.