Pipelined packet switching and queuing architecture
First Claim
1. An apparatus for switching packets, each packet having a header portion and a corresponding tail portion, the apparatus comprising:
- a header processing pipeline, whereinthe header processing pipeline comprises a plurality of pipeline stage circuits connected in a sequence, whereinthe plurality of pipeline stage circuits comprises at least a fetch stage circuit and a gather stage circuit,each stage circuit of the plurality of pipeline stage circuits is configured to pass data to a next circuit,the fetch stage circuit is configured to receive the header portion and store the header portion in a packet header buffer, andthe gather stage circuit is configured toreceive packet type information related to a packet type associated with the header portion from a preceding stage circuit of the plurality of pipeline stage circuits,select a processing profile based on the packet type information,process the header portion in accord with the processing profile to generate a modified header portion, andoutput a modified header portion.
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Accused Products
Abstract
An architecture for a line card in a network routing device is provided. The line card architecture provides a bi-directional interface between the routing device and a network, both receiving packets from the network and transmitting the packets to the network through one or more connecting ports. In both the receive and transmit path, packets processing and routing in a multi-stage, parallel pipeline that can operate on several packets at the same time to determine each packet'"'"'s routing destination is provided. Once a routing destination determination is made, the line card architecture provides for each received packet to be modified to contain new routing information and additional header data to facilitate packet transmission through the switching fabric. The line card architecture further provides for the use of bandwidth management techniques in order to buffer and enqueue each packet for transmission through the switching fabric to a corresponding destination port. The transmit path of the line card architecture further incorporates additional features for treatment and replication of multicast packets.
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Citations
19 Claims
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1. An apparatus for switching packets, each packet having a header portion and a corresponding tail portion, the apparatus comprising:
a header processing pipeline, wherein the header processing pipeline comprises a plurality of pipeline stage circuits connected in a sequence, wherein the plurality of pipeline stage circuits comprises at least a fetch stage circuit and a gather stage circuit, each stage circuit of the plurality of pipeline stage circuits is configured to pass data to a next circuit, the fetch stage circuit is configured to receive the header portion and store the header portion in a packet header buffer, and the gather stage circuit is configured to receive packet type information related to a packet type associated with the header portion from a preceding stage circuit of the plurality of pipeline stage circuits, select a processing profile based on the packet type information, process the header portion in accord with the processing profile to generate a modified header portion, and output a modified header portion. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. An apparatus for switching packets having a line card and a switch fabric, the line card comprising:
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a plurality of buffer memory queues coupled to an ingress data path of the line card, wherein each buffer memory queue stores one or more ingress packets received from a corresponding network interface; a loopback buffer memory coupled to an egress data path of the line card, wherein the loopback buffer memory stores one or more loopback packets received from the egress data path; and a scheduler, coupled to the plurality of buffer memory queues and the loopback memory, configured to select a selected packet from one of the plurality of buffer memory queues and the loopback buffer memory using fair bandwidth allocation, and provide the selected packet to a packet processor. - View Dependent Claims (9, 10, 11, 12, 13)
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14. An apparatus for switching packets having a line card and a switch fabric, the line card comprising:
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an egress packet processor configured to process packets received from the switch fabric for transmission to a network interface; and a switch fabric interface, coupled to the egress packet processor and the switch fabric, the switch fabric interface comprising a first queue configured to store one or more unicast packet headers, a second queue configured to store one or more multicast packet headers, a third queue configured to store packet tail data, and an arbiter configured to receive information from the egress packet processor, and select data from the first, second and third queues in response to the information received from the egress packet processor. - View Dependent Claims (15, 16, 17, 18, 19)
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Specification