Load balancing for a system of cryptographic processors
First Claim
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1. A method for controlling cryptographic operations in a cryptographic processing system, the method comprising:
- providing a plurality of instruction streams from a system memory;
supplying, via a controller, the plurality of instruction streams to a plurality of cryptographic processors of the cryptographic processing system, the supplying of the plurality of instruction streams to-the plurality of cryptographic processors initially based on addresses of the instructions within the system memory;
subsequent to beginning the supplying, dynamically partitioning by the controller at least a portion of the system memory into different dynamically partitioned regions to facilitate pipeline processing of cryptographic operations by the plurality of cryptographic processors based on the dynamically partitioned regions, the dynamically partitioned regions being various-sized regions of system memory, and being sized at least in part according to one or more attributes of the cryptographic operations being processed; and
supplying, via the controller, subsequent instruction streams to the plurality of cryptographic processors of the cryptographic processing system based on the dynamically partitioned regions in the system memory assigned.
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Abstract
In an array of groups of cryptographic processors, the processors in each group operate together but are securely connected through an external shared memory. The processors in each group include cryptographic engines capable of operating in a pipelined fashion. Instructions in the form of request blocks are supplied to the array in a balanced fashion to assure that the processors are occupied processing instructions.
38 Citations
11 Claims
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1. A method for controlling cryptographic operations in a cryptographic processing system, the method comprising:
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providing a plurality of instruction streams from a system memory; supplying, via a controller, the plurality of instruction streams to a plurality of cryptographic processors of the cryptographic processing system, the supplying of the plurality of instruction streams to-the plurality of cryptographic processors initially based on addresses of the instructions within the system memory; subsequent to beginning the supplying, dynamically partitioning by the controller at least a portion of the system memory into different dynamically partitioned regions to facilitate pipeline processing of cryptographic operations by the plurality of cryptographic processors based on the dynamically partitioned regions, the dynamically partitioned regions being various-sized regions of system memory, and being sized at least in part according to one or more attributes of the cryptographic operations being processed; and supplying, via the controller, subsequent instruction streams to the plurality of cryptographic processors of the cryptographic processing system based on the dynamically partitioned regions in the system memory assigned. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A cryptographic processing system for carrying out cryptographic operations, said system comprising:
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a system memory; and a plurality of cryptographic processors in communications with the system memory via a controller, wherein the cryptographic processing system is configured to perform a method, the method comprising; providing a plurality of instruction streams from the system memory; supplying, via the controller. the plurality of instruction streams to the plurality of cryptographic processors of the cryptographic processing system, the supplying of the plurality of instruction streams to the plurality of cryptographic processors initially based on addresses of the instructions within the system memory; subsequent to beginning the supplying, dynamically partitioning by the controller at least a portion of the system memory into different dynamically partitioned regions to facilitate pipelined processing of cryptographic operations by the plurality of cryptographic processors based on the dynamically partitioned regions, the dynamically partitioned regions being various-sized regions of system memory, and being sized at least in part according to one or more attributes of the cryptographic operations being processed; and supplying, via the controller, subsequent instruction streams to the plurality of cryptographic processors of the cryptographic processing system based on the dynamically partitioned regions in system memory assigned. - View Dependent Claims (9, 10, 11)
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Specification