Transitioning to and from a sleep state of a processor
DCFirst Claim
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1. A computer system comprising:
- a processing unit;
circuitry coupled to the processing unit, said circuitry configured to provide to said processing unit;
a sleep voltage;
a first operating voltage; and
a second operating voltage that is less than the first operating voltage;
wherein said computer system has a first transition time for transitioning from said sleep voltage to said first operating voltage;
wherein said computer system has a second transition time for transitioning from said sleep voltage to said second operating voltage;
wherein said second transition time is within an allowed time for transitioning from a sleep state to an operating state; and
wherein said first transition time is greater than said allowed time.
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Abstract
A method for reducing power utilized by a processor including determining that a processor is transitioning from a computer mode to a mode in which system clock to the processor is disabled, and reducing core voltage to the processor to a value sufficient to maintain state during the mode in which system clock is disabled.
108 Citations
21 Claims
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1. A computer system comprising:
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a processing unit; circuitry coupled to the processing unit, said circuitry configured to provide to said processing unit; a sleep voltage; a first operating voltage; and a second operating voltage that is less than the first operating voltage; wherein said computer system has a first transition time for transitioning from said sleep voltage to said first operating voltage; wherein said computer system has a second transition time for transitioning from said sleep voltage to said second operating voltage; wherein said second transition time is within an allowed time for transitioning from a sleep state to an operating state; and wherein said first transition time is greater than said allowed time. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A method of operating a computer processor, said method comprising:
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transitioning from providing a sleep voltage to said computer processor to providing a first operating voltage to said computer processor within an allowed time for transitioning from a sleep state to an operating state; and transitioning from said providing said first operating voltage to said computer processor to providing a second operating voltage to said computer processor, wherein a transition time for changing from said sleep voltage directly to said second operating voltage is greater than said allowed time for transitioning from said sleep state to said operating state. - View Dependent Claims (8, 9, 10)
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11. A computer system comprising:
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a processor; an adjustable voltage supply configured to output to said processor; a first and a second sleep voltage; a first operating voltage responsive to a transition from said first sleep voltage; and a second operating voltage responsive to a transition from said second sleep voltage, wherein said adjustable voltage supply is configured to generate a voltage transition from said second sleep voltage to said first operating voltage in a time period greater than a time period allowed for transition from a sleep state to an operating state of said computer system. - View Dependent Claims (12, 13, 14)
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15. A computer system comprising:
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a processing unit; circuitry coupled to the processing unit, said circuitry configured to provide to said processing unit; a first sleep voltage and a second sleep voltage; a first operating voltage when transitioning from said first sleep voltage; a second operating voltage when transitioning from said second sleep voltage, wherein said first operating voltage is greater than said second operating voltage and wherein said first sleep voltage is greater than said second sleep voltage; and wherein a voltage transition from said second sleep voltage to said first operating voltage is greater than a time allowed for transition from a sleep state to an operating state of said computer system. - View Dependent Claims (16, 17)
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18. A computer system comprising:
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means for processing; means for supplying a voltage coupled to said processing means for providing to said processing means; a first and a second sleep voltage; a first operating voltage responsive to a transition from said first sleep voltage; and a second operating voltage responsive to a transition from said second sleep voltage, wherein said means for supplying a voltage comprises means to generate a voltage transition from said second sleep voltage to said first operating voltage in a time period greater than a time period allowed for transition from a sleep state to an operating state of said computer system. - View Dependent Claims (19, 20, 21)
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Specification