Operational cycle assignment in a configurable IC

• US 7,870,529 B2
• Filed: 08/18/2008
• Issued: 01/11/2011
• Est. Priority Date: 12/01/2004
• Status: Expired due to Fees

• Current Assignee: Altera Corporation (Intel Corporation)
• Original Assignee: Tabula Incorporated
• Inventors: Rohe, Andre, Teig, Steven
• Primary Examiner(s): Chiang, Jack
• Assistant Examiner(s): Sandoval, Patrick
• Application Number:
  US12/193,712
• Publication Number:
  US 20080307378A1
• Time in Patent Office: 876 Days
• Field of Search: 716/6, 716/16, 716/17
• US Class Current: 716/137
• CPC Class Codes: G06F 30/34 for reconfigurable circuits, e.g. field programmable gate arrays [FPGA] or programmable logic devices [PLD]
• CPC Class Codes: H03K 19/17752 for hot reconfiguration
• CPC Class Codes: H03K 19/17756 for partial configuration or partial reconfiguration
• CPC Class Codes: H03K 19/17758 for speeding up configuration or reconfiguration

Abstract

Some embodiments provide a method of designing a configurable integrated circuit (“IC”) with several configurable circuits. The method receives a design having several sets of operations for the configurable circuits to perform in different operational cycles. For at least a first set of operations that has a start operation and an end operation, the method assigns a particular operation in the first set to a first operational cycle based at least partially on the position of the particular operation with respect to the start and end operations.

Claims

1. A method of mapping an integrated circuit (“

IC”

) design to an IC comprising a plurality of reconfigurable circuits performing a plurality of configurable operations in a plurality of reconfigurable cycles, the design comprising a set of components with a set of associated operations, the method comprising;

for each particular component of a plurality of components, performing a calculation that uses a first value derived from a position of the particular component from one end of a signal path and a second value derived from a position of the particular component from another end of the signal path to produce a metric value that is different from the first and second values; and

based on the metric values calculated for different components of the plurality of components, assigning the operations of the different components to different reconfigurable circuits in different reconfigurable cycles.

2. The method of claim 1, wherein assigning the operations of the different components to the different reconfigurable circuits in the different reconfigurable cycles comprises:

for each particular component, identifying a reconfigurable circuit and a reconfigurable cycle in the IC for configurably implementing the operation of the particular component; and

defining a configuration data set for the identified reconfigurable circuit to implement the particular component'"'"'s operation during the identified reconfigurable cycle, wherein the configuration data set is the configuration data set for the reconfigurable circuit during the reconfigurable cycle.

3. A method of mapping an integrated circuit (“

IC”

) design to an IC comprising a plurality of reconfigurable circuits performing a plurality of configurable operations in a plurality of reconfigurable cycles, the design comprising a set of components with a set of associated operations, the method comprising;

for each particular component of a plurality of components;

identifying a first value representing a distance from a start of a first signal path that includes the particular component to the particular component;

identifying a second value representing a distance from the particular component to an end of a second signal path that includes the particular component;

performing a division operation using the first and second values to compute a metric value that is different from the first and the second values; and

assigning the operation of the particular component to a reconfigurable circuit in a particular reconfigurable cycle based on the metric value computed for the particular component;

wherein different components of the plurality of components are assigned to different reconfigurable circuits in different reconfigurable cycles based on the metric values computed for the different components.

4. The method of claim 3, wherein the metric value for each particular component is computed by dividing the first value by a sum of the first and second values with a resultant value between zero and one.

5. The method of claim 3, wherein the identified first and second values represent distances that are measured at least partially in terms of number of intervening components along a signal path.

6. The method of claim 3, wherein the identified first and second values represent distances that are measured at least partially in terms of overall signal delay through intervening components along a signal path.

7. A non-transitory computer readable medium storing a computer program which when executed by at least one processor maps an integrated circuit (“

IC”

) design to an IC comprising a plurality of reconfigurable circuits performing a plurality of configurable operations in a plurality of reconfigurable cycles, the design comprising a plurality of signal paths with different lengths with a plurality of components that have a plurality of associated operations, the computer program comprising sets of instructions for;

computing, for each particular component on each particular signal path, a normalized metric value derived from a distance from a start of the particular signal path to the particular component and a distance from the particular component to an end of the particular signal path; and

assigning, based on the normalized metric values computed for the different components of the plurality of components, the operations of the different components to different reconfigurable circuits in different reconfigurable cycles,

the normalized metric values falling within a range of two finite numbers allowing the plurality of components on the plurality of paths with different lengths to be uniformly sorted so that the assignments of the operations of the different components to the different reconfigurable cycles are consistent with one another.

8. The non-transitory computer readable medium of claim 7, wherein the set of instruction for assigning the operations of the different components to the different reconfigurable circuits in the different reconfigurable cycles comprises sets of instruction for:

identifying, for each particular component, a reconfigurable circuit and a reconfigurable cycle in the IC for configurably implementing the particular component'"'"'s operation; and

defining a configuration data set for the identified reconfigurable circuit to implement the particular component'"'"'s operation during the identified reconfigurable cycle, wherein the configuration data set is the configuration data set for the reconfigurable circuit during the reconfigurable cycle.

9. The non-transitory computer readable medium of claim 7, wherein the set of instructions for computing the normalized metric value for each particular component on each particular signal path comprises sets of instructions for:

identifying a first value representing a distance from a start of the particular signal path that includes the particular component to the particular component;

identifying a second value representing a distance from the particular component to an end of the particular signal path that includes the particular component; and

computing the normalized metric value for the particular component by performing a division operation based on the identified first and second values.

10. The non-transitory computer readable medium of claim 7, wherein the normalized metric value falls within a range of zero and one.

11. The non-transitory computer readable medium of claim 9, wherein the first and second values represent distances that are measured at least partially in terms of number of intervening components along the particular signal path.

12. The non-transitory computer readable medium of claim 9, wherein the first and second values represent distances that are measured at least partially in terms of overall signal delay through intervening components along the particular signal path.

13. A non-transitory computer readable medium storing a computer program which when executed by at least one processor maps an integrated circuit (“

IC”

) design to an IC comprising a plurality of reconfigurable circuits performing a plurality of configurable operations in a plurality of reconfigurable cycles, the design comprising a plurality of signal paths with a plurality of components that have a plurality of associated operations, the computer program comprising sets of instructions for;

for each particular component in the plurality of components;

identifying a first maximum distance from the particular component to a start of any signal path that includes the component;

identifying a second maximum distance from the particular component to an end of any signal path that includes the component;

computing a metric value for the particular component by performing a division operation based on the first maximum distance and the second maximum distance;

based on the metric value computed for each particular component in the plurality of components, assigning the operations of the different components to different reconfigurable circuits in different reconfigurable cycles.

14. The non-transitory computer readable medium of claim 13, wherein the identified first and second maximum distances are measured at least partially in terms of number of intervening components along a signal path.

15. The non-transitory computer readable medium of claim 13, wherein the identified first and second maximum distances are measured at least partially in terms of overall signal delay along a signal path.

16. The non-transitory computer readable medium of claim 13, wherein computing the metric value for the particular component comprises dividing the first maximum distance by a sum of the first maximum distance and the second maximum distance.

17. The non-transitory computer readable medium of claim 13, wherein the first maximum distance is in a numerator of the division operation and the second maximum distance is in a denominator of the division operation.