Semiconductor device and method of manufacturing the same, circuit board, and electronic instrument

• US 7,871,858 B2
• Filed: 12/04/2008
• Issued: 01/18/2011
• Est. Priority Date: 03/27/1998
• Status: Expired due to Term

• Current Assignee: Advanced Interconnect Systems Limited (Vector Capital Corporation)
• Original Assignee: Seiko Epson Corporation (Seiko Group)
• Inventors: Hashimoto, Nobuaki
• Primary Examiner(s): Nguyen; Ha Tran T
• Assistant Examiner(s): WHALEN, DANIEL B
• Application Number:
  US12/314,146
• Publication Number:
  US 20090117687A1
• Time in Patent Office: 775 Days
• Field of Search: 438106-109, 438611-614, 438/672, 438/675, 438/667, 257/734, 257/738, 257/774, 257/E23.011, 257/E23.021, 257/E23.067, 257/E23.135, 257/E23.142, 257/E23.174
• US Class Current: 438/108
• CPC Class Codes: H01L 21/486 Via connections through the substrate with or without pins
• CPC Class Codes: H01L 21/563 Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
• CPC Class Codes: H01L 2224/0401 Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
• CPC Class Codes: H01L 2224/05001 Internal layers
• CPC Class Codes: H01L 2224/05022 the internal layer being at least partially embedded in the surface
• CPC Class Codes: H01L 2224/05099 Material
• CPC Class Codes: H01L 2224/05548 Bonding area integrally formed with a redistribution layer on the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/05647 Copper [Cu] as principal constituent
• CPC Class Codes: H01L 2224/13 of an individual bump connector
• CPC Class Codes: H01L 2224/13099 Material
• CPC Class Codes: H01L 2224/1329 with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
• CPC Class Codes: H01L 2224/133 with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/16237 the bump connector connecting to a bonding area disposed in a recess of the surface of the item
• CPC Class Codes: H01L 2224/2919 with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/45015 being circular
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 : connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/48465 : the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
• CPC Class Codes: H01L 2224/73203 : Bump and layer connectors
• CPC Class Codes: H01L 2224/73204 : the bump connector being embedded into the layer connector
• CPC Class Codes: H01L 2224/73265 : Layer and wire connectors
• CPC Class Codes: H01L 2224/81801 : Soldering or alloying
• CPC Class Codes: H01L 2224/83102 : using surface energy, e.g. capillary forces
• CPC Class Codes: H01L 2224/83192 : wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/83194 : Lateral distribution of the layer connectors
• CPC Class Codes: H01L 2224/8385 : using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
• CPC Class Codes: H01L 2224/85399 : Material
• CPC Class Codes: H01L 2224/92125 : the second connecting process involving a layer connector
• CPC Class Codes: H01L 23/13 : characterised by the shape
• CPC Class Codes: H01L 23/16 : Fillings or auxiliary members in containers or encapsulations, e.g. centering rings H01L23/42, H01L23/552 take precedence
• CPC Class Codes: H01L 23/24 : solid or gel at the normal operating temperature of the device H01L23/3135 takes precedence
• CPC Class Codes: H01L 23/3114 : the device being a chip scale package, e.g. CSP
• CPC Class Codes: H01L 23/49816 : Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
• CPC Class Codes: H01L 23/49827 : Via connections through the substrates, e.g. pins going through the substrate, coaxial cables H01L23/49822, H01L23/49833, H01L23/4985, H01L23/49861 take precedence
• CPC Class Codes: H01L 23/562 : Protection against mechanical damage H01L23/02, H01L23/28 take precedence
• CPC Class Codes: H01L 24/10 : Bump connectors bumps on insulating substrates, e.g. chip carriers, H01L23/49816; Manufacturing methods related thereto
• CPC Class Codes: H01L 24/13 : of an individual bump connector
• CPC Class Codes: H01L 24/16 : of an individual bump connector
• CPC Class Codes: H01L 24/29 : of an individual layer connector
• CPC Class Codes: H01L 24/32 : of an individual layer connector
• CPC Class Codes: H01L 24/48 : of an individual wire connector
• CPC Class Codes: H01L 24/73 : Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
• CPC Class Codes: H01L 24/81 : using a bump connector
• CPC Class Codes: H01L 24/83 : using a layer connector
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/0105 : Tin [Sn]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/0665 : Epoxy resin
• CPC Class Codes: H01L 2924/07802 : not being an ohmic electrical conductor
• CPC Class Codes: H01L 2924/07811 : Extrinsic, i.e. with electrical conductive fillers
• CPC Class Codes: H01L 2924/12041 : LED
• CPC Class Codes: H01L 2924/12042 : LASER
• CPC Class Codes: H01L 2924/15151 : the die mounting substrate comprising an aperture, e.g. for underfilling, outgassing, window type wire connections
• CPC Class Codes: H01L 2924/15183 : in a single layer of the multilayer substrate
• CPC Class Codes: H01L 2924/15184 : in different layers of the multilayer substrate
• CPC Class Codes: H01L 2924/15311 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/19041 : being a capacitor
• CPC Class Codes: H01L 2924/19043 : being a resistor
• CPC Class Codes: H01L 2924/207 : Diameter ranges
• CPC Class Codes: H01L 2924/351 : Thermal stress
• CPC Class Codes: H01L 2924/3512 : Cracking
• CPC Class Codes: H05K 1/112 : directly combined with via connections
• CPC Class Codes: H05K 2201/0305 : Solder used for other purposes than connections between PCB or components, e.g. for filling vias or for programmable patterns
• CPC Class Codes: H05K 2201/0394 : Conductor crossing over a hole in the substrate or a gap between two separate substrate parts
• CPC Class Codes: H05K 3/3457 : Solder materials or compositions; Methods of application thereof
• CPC Class Codes: H05K 3/386 : by the use of an organic polymeric bonding layer, e.g. adhesive
• CPC Class Codes: H05K 3/4038 : Through-connections; Vertical interconnect access [VIA] connections H05K3/403, H05K3/42 take precedence

Abstract

A method of manufacturing a semiconductor device forms a penetrating hole in a substrate so that the penetrating hole extends from a first surface of the substrate to a second surface of the substrate being opposite to the first surface. An internal wall surface of the penetrating hole has a protrusion formed of a material constituting the substrate, the first surface of the substrate being closer to the protrusion than the second surface. A conductive member is formed on the first surface so that the conductive member covers the penetrating hole. A semiconductor chip is mounted on the first surface so that an electrode of the semiconductor chip is electrically connected to the conductive member. An external electrode is provided through the penetrating hole so that the external electrode is electrically connected to the conductive member and the external electrode projects from the second surface of the substrate.

Claims

1. A method of manufacturing a semiconductor device, the method comprising:

providing a substrate;

forming a penetrating hole in the substrate so that the penetrating hole extends from a first surface of the substrate to a second surface of the substrate being opposite to the first surface of the substrate and an internal wall surface of the penetrating hole has a protrusion formed of a material constituting the substrate, the first surface of the substrate being closer to the protrusion than the second surface of the substrate;

forming a conductive member on the first surface of the substrate;

mounting a semiconductor chip on the first surface of the substrate so that an electrode of the semiconductor chip is electrically connected to the conductive member; and

providing an external electrode through the penetrating hole so that the external electrode is connected to a first portion of the conductive member overlapping the penetrating hole and the external electrode projects from the second surface of the substrate.

2. The method of manufacturing a semiconductor device as defined in claim 1,

wherein the forming of the penetrating hole includes punching the substrate from the first surface of the substrate to the second surface of the substrate.

3. The method of manufacturing a semiconductor device as defined in claim 1,

wherein the forming of the penetrating hole includes punching the substrate from the first surface of the substrate to the second surface of the substrate so that a part of the substrate is drawn into the penetrating hole.

4. The method of manufacturing a semiconductor device as defined in claim 1,

wherein, in the forming of the penetrating hole, the penetrating hole is formed by a laser.

5. The method of manufacturing a semiconductor device as defined in claim 1,

wherein, in the forming of the penetrating hole, the penetrating hole is formed by wet etching.

6. The method of manufacturing a semiconductor device as defined in claim 1,

wherein, in the providing of the external electrode, the external electrode is provided to be in contact with the protrusion.

7. The method of manufacturing a semiconductor device as defined in claim 1,

wherein, in the providing of the external electrode, the external electrode is provided to be in contact with a first part of a surface of the protrusion, the first part of the surface of the protrusion facing a second opening of the penetrating hole in the second surface of the substrate.

8. The method of manufacturing a semiconductor device as defined in claim 1,

wherein, in the providing of the external electrode, the external electrode is provided to be in contact with a second part of a surface of the protrusion, the second part of the surface of the protrusion facing a first opening of the penetrating hole in the first surface of the substrate.

9. The method of manufacturing a semiconductor device as defined in claim 1,

wherein, in the forming of the penetrating hole, the penetrating hole is formed so that a second part of a surface of the protrusion is curved in a cross-sectional view, the second part of the surface of the protrusion facing a first opening of the penetrating hole in the first surface of the substrate.

10. A method of manufacturing a semiconductor device, the method comprising:

providing a substrate;

forming a penetrating hole in the substrate so that the penetrating hole extends from a first surface of the substrate to a second surface of the substrate being opposite to the first surface of the substrate and an internal wall surface of the penetrating hole has a protrusion formed of a material constituting the substrate, the first surface of the substrate being closer to the protrusion than the second surface of the substrate;

forming a conductive member on the first surface of the substrate;

mounting a semiconductor chip on the first surface of the substrate so that an electrode of the semiconductor chip is electrically connected to the conductive member; and

providing a conductive material in the penetrating hole so that the conductive material is connected to a first portion of the conductive member overlapping the penetrating hole and the conductive material is in contact with a first part of a surface of the protrusion facing a second opening of the penetrating hole in the second surface of the substrate.

11. The method of manufacturing a semiconductor device as defined in claim 10,

wherein, in the providing of the conductive material, the conductive material is provided to be in contact with a second part of the surface of the protrusion facing a first opening of the penetrating hole in the first surface of the substrate.

12. The method of manufacturing a semiconductor device as defined in claim 10,

wherein, in the forming of the penetrating hole, the penetrating hole is formed so that a second part of the surface of the protrusion is curved in a cross-sectional view, the second part of the surface of the protrusion facing a first opening of the penetrating hole in the first surface of the substrate.