Dual laminate package structure with embedded elements
First Claim
1. A semiconductor package comprising:
- a bottom substrate including a plurality of contacts disposed thereon;
at least one electronic component attached to the bottom substrate and electrically connected to at least one the contacts thereof;
an interposer electrically connected to at least some of the contacts of the bottom substrate;
a top substrate including a plurality of contacts disposed thereon, at least some of the contacts of the top substrate being electrically connected to the interposer; and
a package body defining a peripheral side surface, the package body at least partially encapsulating the top and bottom substrates, the interposer and the electronic component such that at least portions of the bottom substrate and the top substrate are not covered by the package body, and at least a portion of the interposer is exposed in the side surface of the package body.
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Accused Products
Abstract
An interconnect structure (i.e., an interposer) which is mounted and electrically connected to a bottom semiconductor package substrate either prior or subsequent to such bottom substrate being populate with one or more electronic components. Subsequently, a top semiconductor package substrate which may also be populated with one or more electronic components is mounted to the interposer, such that all of the electronic components are disposed between the top and bottom interposers. Thereafter, a suitable mold compound is injected between the top and bottom substrates, the mold compound flowing about the electronic components, between the BGA joints, and at least partially about the interposer, thus helping to lock the interposer in place in the completed semiconductor package.
290 Citations
20 Claims
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1. A semiconductor package comprising:
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a bottom substrate including a plurality of contacts disposed thereon; at least one electronic component attached to the bottom substrate and electrically connected to at least one the contacts thereof; an interposer electrically connected to at least some of the contacts of the bottom substrate; a top substrate including a plurality of contacts disposed thereon, at least some of the contacts of the top substrate being electrically connected to the interposer; and a package body defining a peripheral side surface, the package body at least partially encapsulating the top and bottom substrates, the interposer and the electronic component such that at least portions of the bottom substrate and the top substrate are not covered by the package body, and at least a portion of the interposer is exposed in the side surface of the package body. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A semiconductor package comprising:
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a bottom substrate including a plurality of contacts disposed thereon; a top substrate including a plurality of contacts disposed thereon; at least one electronic component attached to the bottom substrate and electrically connected to at least some the contacts of the bottom substrate; a means for electrically connecting at least some of the contacts of the bottom substrate to at least some of the contacts of the top substrate; and a package body defining a peripheral side surface, the package body at least partially encapsulating the top and bottom substrates, the electrical connection means and the electronic component such that at least portions of the bottom substrate and the top substrate are not covered by the package body, and at least a portion of the electrical connection means is exposed in the side surface of the package body. - View Dependent Claims (12, 13, 14, 15, 16, 17, 18, 19, 20)
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Specification