Method and system for mitigating a voltage standing wave ratio

• US 7,873,332 B2
• Filed: 12/29/2006
• Issued: 01/18/2011
• Est. Priority Date: 12/06/2006
• Status: Active Grant

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: Behzad, Arya
• Primary Examiner(s): Phu; Sanh D
• Application Number:
  US11/618,181
• Publication Number:
  US 20080139144A1
• Time in Patent Office: 1,481 Days
• Field of Search: 455/126, 455/127, 455/103, 455/430, 455/522, 455/115, 455/116
• US Class Current: 455/126
• CPC Class Codes: H03G 3/3042 in modulators, frequency-changers, transmitters or power amplifiers transmission power control in bidirectional transmission systems H04W52/04
• CPC Class Codes: Y02D 30/70 in wireless communication networks

Abstract

Methods and systems for mitigating a voltage standing wave ratio in a transmitter are disclosed and may comprise calibrating an output power of a power amplifier integrated within a chip using a resistor that models an impedance of an antenna that is externally coupled to the amplifier while the antenna is decoupled. The gain and output power of the amplifier may be determined utilizing the known resistance and a voltage that is measured at an input of the power amplifier, or at a number of points prior to the power amplifier. When the antenna may be coupled to the transmitter, the transmitter output power may then be controlled utilizing the voltage measurements prior to the power amplifier to avoid measuring reflected waves in instances when the antenna impedance may vary. The power amplifier may be of a design that comprises reverse isolation to reduce reflected waves from the antenna.

Claims

1. A method for controlling a circuit within a transmitter, the method comprising:

calibrating an output power of a power amplifier integrated within a chip using an on-chip resistor that models an impedance of an antenna that is externally coupled to said power amplifier when in a transmit mode, wherein;

said calibrating comprises coupling said power amplifier to said on-chip resistor when said power amplifier is decoupled from said antenna and measuring a power level at one or more stages in a transmit chain in the transmitter; and

said one or more stages are located prior to an output of said power amplifier.

2. The method according to claim 1, comprising controlling said output power of said power amplifier based on a voltage that is measured at an input of said power amplifier.

3. The method according to claim 2, comprising detecting said voltage at said input of said power amplifier.

4. The method according to claim 3, comprising detecting said voltage at an output of a power amplifier driver coupled to said input of said power amplifier.

5. The method according to claim 2, comprising controlling said output power of said power amplifier based on said voltage that is measured prior to said input of said power amplifier.

6. The method according to claim 5, comprising detecting one or more voltages at one or more locations in said transmit chain prior to said input of said power amplifier.

7. The method according to claim 6, comprising generating a gain based on said detected one or more voltages.

8. The method according to claim 7, comprising controlling said output power of said power amplifier based on said generated gain.

9. The method according to claim 1, comprising selecting a reverse isolation gain of said power amplifier for reducing the effect of VSWR.

10. The method according to claim 1, wherein said antenna is decoupled from said power amplifier during said calibration.

11. The method according to claim 1, where said on-chip resistor is integrated in a transmit/receive switch coupled to said transmitter.

12. A system for controlling circuitry within a transmitter, the system comprising:

one or more circuits within a chip that calibrate an output power of a power amplifier integrated within said chip using an on-chip resistor that models an impedance of an antenna that is externally coupled to said power amplifier when in a transmit mode;

wherein;

said calibration comprises coupling said power amplifier to said on-chip resistor when said power amplifier is decoupled from said antenna and measuring a power level at one or more stages in a transmit chain of the transmitter; and

said one or more stages are located prior to an output of said power amplifier.

13. The system according to claim 12, wherein said one or more circuits controls an output power of said power amplifier based on a voltage that is measured at an input of said power amplifier.

14. The system according to claim 13, wherein said one or more circuits detects a voltage at said input of said power amplifier.

15. The system according to claim 14, wherein said one or more circuits detects said voltage at an output of a PAD coupled to said input of said power amplifier.

16. The system according to claim 13, wherein said one or more circuits controls said output power of said power amplifier based on said voltage, which is measured prior to said input of said power amplifier.

17. The system according to claim 16, wherein said one or more circuits detects one or more voltages at one or more corresponding locations in said transmit chain prior to said input of said power amplifier.

18. The system according to claim 17, wherein said one or more circuits generates a gain based on said detected one or more voltages.

19. The system according to claim 18, wherein said one or more circuits controls said output of said power amplifier based on said generated gain.

20. The system according to claim 12, wherein said one or more circuits is selected for a reverse isolation gain of said power amplifier for reducing the effect of VSWR.

21. The system according to claim 12, wherein said antenna is decoupled from said power amplifier during said calibration.

22. The system according to claim 12, wherein said on-chip resistor is integrated in a transmit/receive switch coupled to said transmitter.

23. A method for controlling a circuit within a transmitter, the method comprising:

calibrating an output power of a power amplifier integrated within a chip using an on-chip resistor that models an impedance of an antenna that is externally coupled to said power amplifier when in transmit mode, and one or more on-chip voltage detectors that are coupled to one or more stages in a transmit chain of the transmitter, wherein said calibrating comprises coupling said power amplifier to said on-chip resistor when said power amplifier is decoupled from said antenna and measuring a power level at one or more of said stages prior to an output of said power amplifier in said transmit chain.

24. The method according to claim 23, comprising detecting one or more voltages by corresponding said one or more on-chip voltage detectors.

25. The method according to claim 24, comprising generating a gain based on said detected one or more voltages.

26. The method according to claim 25, comprising controlling said output power of said power amplifier based on said generated gain.