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Strain-silicon CMOS using etch-stop layer and method of manufacture

  • US 7,875,543 B1
  • Filed: 08/28/2008
  • Issued: 01/25/2011
  • Est. Priority Date: 06/07/2005
  • Status: Expired due to Fees
First Claim
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1. A method of fabricating a transistor comprising:

  • forming sidewall spacers on a gate;

    etching silicon in source and drain regions to form recesses below an original surface of the silicon;

    forming an ohmic contact layer over the source and drain regions; and

    forming a stressed silicon nitride layer in the recesses over at least portions of the ohmic contact layer proximate to the gate.

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