Data subset selection algorithm for reducing data-pattern autocorrelations
First Claim
1. A method of processing a digital stream of bits at a receiver, said method comprising:
- receiving a bit stream at the receiver;
detecting predetermined bit combinations at n-bit spacings in the bit stream;
selecting, at the receiver, a subset of said bit stream having reduced data-pattern autocorrelations present in said subset of said bit stream relative to said bit stream by discarding bits of one or more given bit combinations when a number of the one or more given bit combinations exceeds a predetermined limit for the one or more given bit combinations relative to other of the predetermined bit combinations; and
passing said subset of said bit stream from the receiver to an adaptation engine.
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Abstract
A method and apparatus are provided for reducing, and preferably substantially eliminating, data-pattern autocorrelations found in digital communication systems. The method employed is referred to as Data Subset Selection (DSS) and is implemented in the form of DSS engine. Autocorrelations in the data-pattern can cause many digital adaptive systems to converge to an incorrect solution. For example, the LMS method, which is often used in adaptive filtering applications, can converge to an incorrect set of filter coefficients in the presence of data-pattern autocorrelations. Digital timing recovery methods are also susceptible. Other impairments that result from data-pattern autocorrelations include increased convergence time and increased steady-state chatter. DSS reduces, and preferably substantially eliminates, data-pattern autocorrelations by selecting a subset of the data stream that either demonstrates smaller autocorrelations or no autocorrelations, thus improving the performance of the aforementioned digital adaptive systems.
28 Citations
43 Claims
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1. A method of processing a digital stream of bits at a receiver, said method comprising:
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receiving a bit stream at the receiver; detecting predetermined bit combinations at n-bit spacings in the bit stream; selecting, at the receiver, a subset of said bit stream having reduced data-pattern autocorrelations present in said subset of said bit stream relative to said bit stream by discarding bits of one or more given bit combinations when a number of the one or more given bit combinations exceeds a predetermined limit for the one or more given bit combinations relative to other of the predetermined bit combinations; and passing said subset of said bit stream from the receiver to an adaptation engine. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23)
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24. An apparatus for reducing data-pattern autocorrelations in digital communication systems, said apparatus comprising:
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an adaptation engine for processing a digital stream of bits; and a data subset selection engine receiving the digital stream of bits, the data subset selection engine formed by a delay block generating an n-bit delayed stream of said digital stream of bits, where n is an integer; a set of detector blocks accepting said n-bit delayed stream of bits and said digital stream of bits, and detecting predetermined bit combinations from said digital stream of bits and said n-bit delayed stream of bits; a detector controller controlling said set of detector blocks to detect the bit combinations, and selecting a subset of said digital stream of bits having reduced data-pattern autocorrelations relative to said digital stream of bits by discarding bits of one or more given bit combinations when the number of the one or more given bit combinations exceeds a predetermined limit for the one or more given bit combinations relative to other of the predetermined bit combinations; and a logic gate passing said subset of said digital stream having reduced data-pattern autocorrelations relative to said digital stream of bits to said adaptation engine; wherein said data subset selection engine reduces said data-pattern autocorrelations between a plurality of multiple bit combinations with independent, integer-valued spacings between the bits, said multiple bit combinations being combinations of more than two bits;
wherein said apparatus is located at a receiver and is formed by a combination of at least one electronic hardware and computer implementable software.- View Dependent Claims (25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43)
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Specification