Compact low loss high frequency switch with improved linearity performance

• US 7,877,058 B2
• Filed: 11/06/2007
• Issued: 01/25/2011
• Est. Priority Date: 11/10/2006
• Status: Active Grant

• Current Assignee: Skyworks Solutions Incorporated
• Original Assignee: Skyworks Solutions Incorporated
• Inventors: Nabokin, Sergey, Prikhodko, Dima, Pessia, John, Sprinkle, Steven C., Chiesa, Jason, Shirokov, Mikhail, Tkachenko, Gene A., Carter, Richard A., Mason, Jerod F., Matte, Steven P.
• Primary Examiner(s): Dao; Minh D
• Application Number:
  US11/935,690
• Publication Number:
  US 20080166981A1
• Time in Patent Office: 1,176 Days
• Field of Search: 455/13.3, 455/63.3, 455/63.1, 455/501, 455/78, 455/83, 455/25, 455/562.1, 333/103, 327/308
• US Class Current: 455/13.3
• CPC Class Codes: H01P 1/15 by semiconductor devices
• CPC Class Codes: H03K 17/6871 the output circuit comprising more than one controlled field-effect transistor
• CPC Class Codes: H03K 17/693 Switching arrangements with several input- or output-terminals, e.g. multiplexers, distributors logic circuits H03K19/00; code converters H03M5/00, H03M7/00
• CPC Class Codes: H04B 1/48 in circuits for connecting transmitter and receiver to a common transmission path, e.g. by energy of transmitter H04B1/46 takes precedence

Abstract

A switch element includes a switch device having a drain, a source and a plurality of gates, and at least one additional interconnect located between the plurality of gates, the additional interconnect operative to establish a constant potential between the at least two gates.

Claims

1. A switch element, comprising:

a switch device having a drain, a source and a plurality of gates; and

at least one additional interconnect located between the plurality of gates, the additional interconnect having a line width of approximately 0.5 μ

m, the additional interconnect operative to establish a constant potential between the plurality of gates.

2. The switch element of claim 1, further comprising at least three gates and at least two additional interconnects interleaved with the at least three gates.

3. The switch element of claim 1, in which the plurality of gates are configured as ohmic contacts.

4. The switch element of claim 1, in which the plurality of gates are configured as Schottky contacts.

5. The switch element of claim 1, in which a pair of switch devices are coupled together.

6. The switch element of claim 1, in which the at least one additional interconnect has a line width of approximately 0.5 μ

m and in which each of the plurality of gates has a line width of approximately 0.5 μ

m.

7. A portable transceiver having an antenna switch, comprising:

a transmitter operatively coupled to a receiver;

a switch device operatively coupled to the transmitter and to the receiver, the switch device having a drain, a source and a plurality of gates; and

at least one additional interconnect located between the plurality of gates, the additional interconnect having a line width of approximately 0.5 μ

m, the additional interconnect operative to establish a constant potential between the plurality of gates.

8. The transceiver of claim 7, in which the switch device further comprises at least three gates and at least two additional interconnects interleaved with the at least three gates.

9. The transceiver of claim 7, in which the plurality of gates are configured as ohmic contacts.

10. The transceiver of claim 7, in which the plurality of gates are configured as Schottky contacts.

11. The transceiver of claim 7, in which a pair of switch devices are coupled together.

12. The transceiver of claim 7, in which the at least one additional interconnect has a line width of approximately 0.5 μ

m and in which each of the plurality of gates has a line width of approximately 0.5 μ

m.

13. A method for making a switch element, comprising:

forming a switch device having a drain, a source and a plurality of gates; and

forming at least one additional interconnect located between the plurality of gates, the additional interconnect operative to establish a constant potential between the plurality of gates.

14. The method of claim 13, further comprising forming at least three gates and at least two additional interconnects interleaved with the at least three gates.

15. The method transceiver of claim 13, further comprising forming the plurality of gates as ohmic contacts.

16. The method of claim 13, further comprising forming the plurality of gates as Schottky contacts.

17. The method of claim 13, further comprising forming a pair of switch devices coupled together.

18. The method of claim 13, further comprising forming the at least one additional interconnect to have a line width of approximately 0.5 μ

m.

19. The method of claim 13, further comprising forming the at least one additional interconnect to have a line width of approximately 0.5 μ

m and forming each of the plurality of gates to have a line width of approximately 0.5 μ

m.