Programmable partitioning for high-performance coherence domains in a multiprocessor system
First Claim
1. A multiprocessor computing system comprising:
- a multitude of processing units, each of the processing units including a local cache;
a multitude of snoop units for supporting cache coherency in the multiprocessor system, each of the snoop units being connected to and associated with a respective one of the processing units and connected to all of the other snoop units; and
a partitioning system for using the snoop units to partition the multitude of processing units and the multitude of snoop units into a plurality of separate, independent, memory-consistent, adjustable-size processing groups and to maintain cache coherency within each of said processing groups, wherein each of said processing groups includes one or more of the processing units and each of the snoop units associated with said one or more of the processing units; and
wherein;
in use, data packets resulting from memory access requests are sent from the processing units to the snoop units, and each of the snoop units includesa packet processor for processing said data packets, and a programmable register identifying selected ones of the processing units; and
each snoop unit processes only the data packets from said selected ones of the processing units, and said each snoop unit is blocked from processing data packets coming from the processing units outside the processing group to which said each snoop unit belongs to effect partitioning of the multitude of processing units into said separate groups.
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Abstract
A multiprocessor computing system and a method of logically partitioning a multiprocessor computing system are disclosed. The multiprocessor computing system comprises a multitude of processing units, and a multitude of snoop units. Each of the processing units includes a local cache, and the snoop units are provided for supporting cache coherency in the multiprocessor system. Each of the snoop units is connected to a respective one of the processing units and to all of the other snoop units. The multiprocessor computing system further includes a partitioning system for using the snoop units to partition the multitude of processing units into a plurality of independent, memory-consistent, adjustable-size processing groups. Preferably, when the processor units are partitioned into these processing groups, the partitioning system also configures the snoop units to maintain cache coherency within each of said groups.
111 Citations
19 Claims
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1. A multiprocessor computing system comprising:
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a multitude of processing units, each of the processing units including a local cache; a multitude of snoop units for supporting cache coherency in the multiprocessor system, each of the snoop units being connected to and associated with a respective one of the processing units and connected to all of the other snoop units; and a partitioning system for using the snoop units to partition the multitude of processing units and the multitude of snoop units into a plurality of separate, independent, memory-consistent, adjustable-size processing groups and to maintain cache coherency within each of said processing groups, wherein each of said processing groups includes one or more of the processing units and each of the snoop units associated with said one or more of the processing units; and
wherein;in use, data packets resulting from memory access requests are sent from the processing units to the snoop units, and each of the snoop units includes a packet processor for processing said data packets, and a programmable register identifying selected ones of the processing units; and each snoop unit processes only the data packets from said selected ones of the processing units, and said each snoop unit is blocked from processing data packets coming from the processing units outside the processing group to which said each snoop unit belongs to effect partitioning of the multitude of processing units into said separate groups. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A method for logically partitioning a multiprocessor computing system, said multiprocessor computing system comprising a multitude of processing units, each of the processing units including a local cache, and the multiprocessor computing system further comprising a multitude of snoop units for supporting cache coherency in the multiprocessor computing system, each of the snoop units being connected to and associated with a respective one of the processing units and connected to all of the other snoop units of the multiprocessor computing system, the method comprising the steps of:
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transmitting data packets resulting from memory access requests from the processing units to the snoop units; and using the snoop units to partition the multitude of processing units and the multitude of snoop units into a plurality of separate independent, memory-consistent, adjustable-size processing groups and to maintain cache coherency within each of said processing groups, wherein each of said processing groups includes one or more of the processing units and each of the snoop units associated with said one or more of the processing units; and
wherein;each of the data packets includes a packet processor for processing the data packets, and a programmable register identifying selected ones of the processing units; and each snoop unit processes only the snoop units from said selected ones of the processing units, and said each snoop unit is blocked from processing data packets coming from the processing units outside the processing group to which said each snoop unit belongs to effect partitioning of the multitude of processing units into said separate processing groups. - View Dependent Claims (11, 12, 13, 14, 15, 16)
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17. A program storage device readable by machine, tangibly embodying a program of instructions executable by the machine to perform method steps for logically partitioning a multiprocessor computing systems, said multiprocessor computing system comprising a multitude of processing units, each of the processing units including a local cache, and the multiprocessor computing system further comprising a multitude of snoop units for supporting cache coherency in the multiprocessor computing system, each of the snoop units being connected to and associated with a respective one of the processing units and connected to all of the other snoop units of the multiprocessor computing system, said method steps comprising the steps of:
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transmitting data packets from the processor units to the snoop units; and using the snoop units to partition the multitude of processor units into a plurality of separate, independent, memory-coherent adjustable-size processing groups and to maintain cache coherency within each of said processing groups, wherein each of said processing groups includes one or more of the processing units and each of the snoop units associated with said one or more of the processing units; and
wherein;each of the snoop units includes a packet processor for processing the data packets, and a programmable register identifying selected ones of the processing units; and each snoop unit processes only the data packets from said selected ones of the processing units, and said each snoop unit is blocked from processing data packets coming from the processing units outside the processing group to which said each snoop unit belongs to effect partitioning of the multitude of processing units into said separate processing groups. - View Dependent Claims (18, 19)
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Specification