Device and method for on-die temperature measurement

• US 7,878,016 B2
• Filed: 12/30/2004
• Issued: 02/01/2011
• Est. Priority Date: 12/30/2004
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Hermerding, Jim G., Rotem, Efraim, Cooper, Barnes, Distefano, Eric
• Primary Examiner(s): JIANG, CHEN WEN
• Application Number:
  US11/025,140
• Publication Number:
  US 20060149974A1
• Time in Patent Office: 2,224 Days
• Field of Search: 622/592, 713/300, 713/501, 374/141, 374/166, 374/170, 257/723, 702/132
• US Class Current: 62/259.2
• CPC Class Codes: G06F 1/206 comprising thermal management
• CPC Class Codes: G06F 11/3024 where the computing system component is a central processing unit [CPU]
• CPC Class Codes: G06F 11/3058 Monitoring arrangements for monitoring environmental properties or parameters of the computing system or of the computing system component, e.g. monitoring of power, currents, temperature, humidity, position, vibrations thermal management in cooling arrangements of a computing system G06F1/206

Abstract

A system for measuring and managing thermal operations of a processor core on a semiconductor die using a sensor positioned in a hotspot of the processor core. A measured temperature reading is determined based upon a temperature sensed by the sensor. Interrupt signals and a software readable register indicating temperature information provide feedback about the thermal environment to the processor. Based upon the measured temperature reading, the interrupt signals direct the processor to modify operation.

Claims

1. A device comprising:

a processor having a hotspot during operation, the hotspot being a localized region having a higher temperature than regions of the processor adjoining the hotspot;

a p-n junction within the hotspot, a junction voltage of the p-n junction to change as a function of the temperature of the hotspot of the processor;

a comparator to compare a voltage from the p-n junction with a voltage representing a first threshold temperature value;

an analog-to-digital converter to convert the voltage from the p-n junction into a measured temperature reading;

a logic circuit to monitor the measured temperature reading to determine occurrence of particular thermal events to direct the processor to modify processor-operation when a thermal event occurs; and

a semiconductor die comprising the processor, the p-n junction, the comparator, the analog-to-digital converter, and the logic circuit.

2. The device according to claim 1, wherein the logic circuit comprises at least one digital comparator to compare the measured temperature reading with at least a second threshold temperature value.

3. The device according to claim 2, wherein said at least a second threshold temperature value is accessible to, and modifiable by, instructions executed the processor.

4. The device according to claim 1, wherein the logic circuit comprises a trend circuit to calculates trends of the measured temperature reading over a period of time, the trend circuit comprising:

at least one memory element to register temperature at a previous time and a comparison circuit to compare this previous temperature to the current temperature.

5. The device according to claim 1, wherein the logic circuit comprises an averaging circuit to calculate an average of the measured reading over a period of time, the averaging circuit comprising:

at least one memory element to accumulate an average result and at least one computation element to modify the average result in accordance to current temperature.

6. The device according to claim 1, wherein an output from the logic circuit indicating occurrence of a particular thermal event is provided as an output from the semiconductor die.

7. The device according to claim 1, the semiconductor die further comprising a register readable to instructions executed on said processor to store the measured temperature reading, or store a temperature value based on the measured temperature reading.

8. The device according to claim 7, wherein the register readable to instructions is model-specific register (MSR) address space of the processor.

9. The device according to claim 7, the semiconductor die further comprising a memory containing a look-up table, the measured temperature reading to be input into the memory and a scaled temperature reading to be output by the memory, the look-up table programmed to compensate for non-linearity in the measured temperature reading,

wherein the scaled temperature reading to be stored in the register readable to instructions.

10. The device according to claim 1, the die further comprising:

another processor having another hotspot, with another p-n junction, comparator, analog-to-digital converter, and logic circuit; and

a routing matrix comprising memory storing a decision table, the routing matrix to receive the thermal event indications from the logic circuits, and receive outputs from the comparators, to route thermal event directives to the processors in accordance with the decision table.

11. The device according to claim 1, the die further comprising:

another hotspot, with another p-n junction and another comparator, the another comparator to compare a voltage from the another p-n junction with the voltage representing the first threshold value; and

a logic gate to receive outputs from the comparators and to signal if at least one of the hotspots exceeds the first threshold value.