Wireless interface probe card for high speed one-shot wafer test and semiconductor testing apparatus having the same

• US 7,880,490 B2
• Filed: 08/28/2008
• Issued: 02/01/2011
• Est. Priority Date: 09/07/2007
• Status: Active Grant

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: An, Young-Soo, Lee, Sang-Hoon, Lee, Kwang-Yong, Oh, Se-Jang
• Primary Examiner(s): Nguyen; Ha Tran T
• Assistant Examiner(s): BENITEZ ROSARIO, JOSHUA
• Application Number:
  US12/200,716
• Publication Number:
  US 20090066350A1
• Time in Patent Office: 887 Days
• Field of Search: 324/158.1, 324754-762, 324/765
• US Class Current: 324/750.3
• CPC Class Codes: G01R 31/2889 Interfaces, e.g. between probe and tester G01R31/31905 and G01R1/07364 take precedence
• CPC Class Codes: G01R 31/3025 Wireless interface with the DUT

Abstract

A wireless interface probe card includes a substrate member and a transmission member. The substrate member has a plurality of probe terminals arranged at a constant pitch. The probe terminals may directly contact a plurality of pads arranged at a constant pitch on each of a plurality of semiconductor chips arranged on a wafer to perform a test of the semiconductor chips arranged on the wafer. The transmission member is arranged on the substrate member, wirelessly receives a test signal and provides the received test signal to the pads of the wafer through the probe terminals, and wirelessly and externally transmits an electrical characteristic signal provided from the pads of the wafer through the probe terminals.

Claims

1. A wireless interface probe card for a semiconductor testing apparatus, comprising:

a substrate member including a plurality of probe terminals having a predefined pitch, the probe terminals capable of directly contacting a plurality of pads, the pads having the predefined pitch, the pads being arranged on each of a plurality of semiconductor chips on a wafer to perform a test of the semiconductor chips; and

a plurality of transmission members constructed and arranged on the substrate member to wirelessly receive a plurality of test signals, to provide the received test signals to the pads through corresponding probe terminals, and to wirelessly transmit electrical characteristics of at least one of the semiconductor chips received via the pads through corresponding probe terminals,

wherein the plurality of transmission members comprise;

a plurality of respective transceivers arranged on the substrate member and respectively corresponding to the probe terminals; and

a plurality of antennas, each antenna corresponding to one of the transceivers,

wherein each of the transceivers comprises;

a receiving portion that comprises;

a first filter configured to filter at least one of the test signals received by an antenna of the plurality of antennas,

a first amplifier configured to amplify an output signal of the first filter, and

a demodulator configured to demodulate an output signal of the first amplifier and to provide a demodulated output signal to a probe terminal of the plurality of probe terminals;

a transmission portion that comprises;

a modulator configured to modulate at least one of the electrical characteristics of at least one of the semiconductor chips,

a second filter configured to filter an output signal of the modulator, and

a second amplifier configured to amplify an output signal of the second filter and to provide the amplified output signal to the antenna;

a first duplexer configured to transfer the demodulated output signal of the demodulator to the probe terminal during a receiving operation, and to transfer the at least one of the electrical characteristics from the probe terminal to the modulator during a transmission operation; and

a second duplexer configured to transfer the at least one of the test signals from the antenna to the first filter during the receiving operation, and to transfer the amplified output signal of the second amplifier to the antenna during the transmission operation.

2. The wireless interface probe card of claim 1, wherein the substrate member comprises:

a first silicon substrate having a plurality of first wiring lines arranged at a first pitch; and

a second silicon substrate having a plurality of second wiring lines arranged at a second pitch,

wherein the second silicon substrate is stacked on the first silicon substrate to form the probe terminals by electrically coupling the second wiring lines to the first wiring lines.

3. The wireless interface probe card of claim 2, wherein the first silicon substrate further comprises a plurality of first through holes penetrating the first silicon substrate, wherein the first wiring lines are respectively embedded in the first through holes, wherein the second silicon substrate further comprises a plurality of second through holes penetrating the second silicon substrate, and wherein the second wiring lines are respectively embedded in the second through holes.

4. The wireless interface probe card of claim 3, wherein the first pitch between the first wiring lines is substantially the same as the second pitch between the second wiring lines, and wherein the first wiring lines are electrically coupled to the second wiring lines, respectively.

5. The wireless interface probe card of claim 4, wherein the first pitch between the first wiring lines and the second pitch between the second wiring lines are substantially the same as the predefined pitch between the pads arranged on each of the semiconductor chips.

6. The wireless interface probe card of claim 3, wherein the first pitch between the first wiring lines is smaller than the second pitch between the second wiring lines, and wherein the first pitch is substantially the same as the predefined pitch between the pads arranged on each of the semiconductor chips.

7. The wireless interface probe card of claim 6, wherein the substrate member further comprises a plurality of third wiring lines to electrically couple the first wiring lines and the second wiring lines, wherein the third wiring lines are arranged on a surface of the first silicon substrate facing the second silicon substrate, and directly coupled to the first wiring lines of the first silicon substrate and the second wiring lines of the second silicon substrate.

8. The wireless interface probe card of claim 6, wherein the substrate member further comprises a plurality of third wiring lines to electrically couple the first wiring lines and the second wiring lines, wherein the third wiring lines are arranged on a surface of the second silicon substrate facing the first silicon substrate, and directly coupled to the first wiring lines of the first silicon substrate and the second wiring lines of the second silicon substrate.

9. A semiconductor testing apparatus comprising:

a tester head configured to provide test signals to each of a plurality of pads arranged on each of a plurality of semiconductor chips arranged on a wafer, and to determine whether any of the semiconductor chips are defective by receiving electrical characteristics of each of the semiconductor chips via the pads;

a wireless interface probe card comprising a first substrate member including a plurality of probe terminals, the probe terminals capable of directly contacting the pads arranged on each of the semiconductor chips arranged on the wafer to perform a test of each of the semiconductor chips, and a plurality of transmission members arranged on the first substrate member to wirelessly receive the test signals, to provide the received test signals to the pads through the probe terminals, and to wirelessly transmit the electrical characteristics of each of the semiconductor chips received via the pads; and

a wireless interface card comprising a second substrate member and configured to receive the test signals from the tester head, and including a plurality of transmission members arranged on the second substrate member to wirelessly transmit the received test signals to the plurality of transmission members of the wireless interface probe card, and to wirelessly receive the electrical characteristics of each of the semiconductor chips from the plurality of transmission members of the wireless interface probe card,

wherein the first substrate member is separate from the second substrate member.

10. The semiconductor testing apparatus of claim 9, wherein the first substrate member comprises:

a first silicon substrate having a plurality of first wiring lines arranged at a first pitch; and

a second silicon substrate having a plurality of second wiring lines arranged at a second pitch,

wherein the second silicon substrate is stacked on the first silicon substrate to form the probe terminals by electrically coupling the second wiring lines to the first wiring lines.

11. The semiconductor testing apparatus of claim 10, wherein the first pitch between the first wiring lines is substantially the same as the second pitch between the second wiring lines, and wherein the first wiring lines are electrically coupled to the second wiring lines, respectively.

12. The semiconductor testing apparatus of claim 10, wherein the first pitch between the first wiring lines and the second pitch between the second wiring lines are substantially the same as the constant pitch between the pads arranged on each of the semiconductor chips.

13. The semiconductor testing apparatus of claim 12, wherein the first substrate member further comprises a plurality of third wiring lines to electrically couple the first wiring lines and the second wiring lines, wherein the third wiring lines are arranged on a surface of the first silicon substrate facing the second silicon substrate, and directly coupled to the first wiring lines of the first silicon substrate and the second wiring lines of the second silicon substrate.

14. The semiconductor testing apparatus of claim 9, wherein each of the transmission members of the wireless interface probe card comprises:

a first transceiver arranged on the first substrate member and corresponding to a probe terminal of the plurality of probe terminals and including a transmission portion to transmit at least one of the electrical characteristics of each of the semiconductor chips from the probe terminal through an antenna, and a receiving portion to receive at least one of the test signals through an antenna and to provide the received at least one test signal to the probe terminal.

15. The semiconductor testing apparatus of claim 14,

wherein the receiving portion comprises:

a first filter configured to filter the at least one test signal received by the antenna;

a first amplifier configured to amplify an output signal of the first filter; and

a demodulator configured to demodulate an output signal of the first amplifier and to provide a demodulated output signal to a first duplexer,

wherein the transmission portion comprises;

a modulator configured to modulate the at least one electrical characteristic;

a second filter configured to filter an output signal of the modulator; and

a second amplifier configured to amplify an output signal of the second filter and to provide the amplified output signal to a second duplexer,

wherein the first duplexer is configured to transfer the demodulated output signal of the demodulator to the probe terminal during a receiving operation, and to transfer the at least one electrical characteristic from the probe terminal to the modulator during a transmission operation; and

wherein the second duplexer is configured to transfer the at least one test signal from the antenna to the first filter during the receiving operation, and to transfer the amplified output signal of the second amplifier to the antenna during the transmission operation.

16. The semiconductor testing apparatus of claim 9, wherein each of the plurality of transmission members of the wireless interface card comprises:

a tranceiver arranged on the second substrate member corresponding to a tranceiver of the wireless interface probe card and having a transmission portion to wirelessly transmit at least one of the test signals received from the tester head to the transceiver of the wireless interface probe card through an antenna, and a receiving portion to wirelessly receive at least one of the electrical characteristics from the transceiver of the wireless interface probe card through the antenna.

17. The semiconductor testing apparatus of claim 9, wherein each of the plurality of transmission members of the wireless interface card receives/transmits at least one of the electrical characteristics or at least one of the test signals from/to a corresponding transmission member of the wireless interface probe card.

18. A semiconductor testing system comprising:

a tester head configured to provide test signals;

a wireless interface card electrically coupled to the tester head, the wireless interface card configured to receive the test signals and to wirelessly transmit the test signals; and

a wireless interface probe card including a plurality of probe terminals configured to be coupled to pads of each of a plurality of semiconductor chips, the wireless interface probe card configured to wirelessly transmit electrical characteristics of each of the semiconductor chips to the wireless interface card responsive to the test signals,

wherein the wireless interface card includes a plurality of transmission members arranged on a first substrate member to wirelessly receive the electrical characteristics from the wireless interface probe card, and to wirelessly transmit the test signals to the wireless interface probe card,

wherein the wireless interface probe card includes a plurality of transmission members arranged on a second substrate member to wirelessly receive the test signals from the wireless interface card and to wirelessly transmit the electrical characteristics to the wireless interface card, and

wherein the first substrate member is separate from the second substrate member.

19. The semiconductor testing apparatus of claim 18, wherein each of the transmission members of the wireless interface card comprises:

a transceiver arranged on the first substrate member, the tranceiver corresponding to a transceiver of the wireless interface probe card and including a transmission portion to transmit at least one of the electrical characteristics to the test head through an antenna and a receiving portion to receive at least one of the test signals and to provide the received test signal to the transceiver of the wireless interface probe card through the antenna.

20. The semiconductor testing system of claim 18, wherein each of the plurality of transmission members of the wireless interface card receives/transmits at least one of the electrical characteristics or at least one of the test signals from/to a corresponding transmission member of the wireless interface probe card.