Semiconductor device
First Claim
1. A semiconductor device comprising:
- a first antenna circuit;
a second antenna circuit;
a first power supply circuit configured to generate a first direct voltage by converting a first radio signal received by the first antenna circuit into a direct voltage and boosting the direct voltage;
a second power supply circuit configured to generate a second direct voltage from a second radio signal received by the second antenna circuit; and
a memory circuit comprising a memory cell and a control circuit,wherein the memory cell is configured to hold a signal by using the first direct voltage, andwherein the control circuit is configured to control the memory cell by using the second direct voltage.
1 Assignment
0 Petitions
Accused Products
Abstract
In an RF tag, a mask ROM or a flash memory is used for storing data such as an ID number. Although the mask ROM can be realized at a low price, rewriting is not possible. In addition, in the flash memory, although electric rewriting is possible, production cost increases. Accordingly, it is difficult to provide an RF tag by which data rewriting is possible at a low price. An RF tag is provided with a power supply circuit having a function to generate a power supply voltage from a weak radio signal and a memory which can hold data stored in a data holding portion by the power supply voltage. With the above structure, a high-performance RF tag capable of rewriting data such as an ID number after production can be provided at a low price.
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Citations
30 Claims
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1. A semiconductor device comprising:
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a first antenna circuit; a second antenna circuit; a first power supply circuit configured to generate a first direct voltage by converting a first radio signal received by the first antenna circuit into a direct voltage and boosting the direct voltage; a second power supply circuit configured to generate a second direct voltage from a second radio signal received by the second antenna circuit; and a memory circuit comprising a memory cell and a control circuit, wherein the memory cell is configured to hold a signal by using the first direct voltage, and wherein the control circuit is configured to control the memory cell by using the second direct voltage. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A semiconductor device comprising:
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a first antenna circuit; a second antenna circuit; a first power supply circuit configured to generate a first direct voltage by converting a radio signal received by the first antenna circuit into a direct voltage and boosting the direct voltage; a second power supply circuit configured to generate a second direct voltage from the radio signal received by the second antenna circuit; and a memory circuit comprising a memory cell and a control circuit, wherein the memory cell is configured to hold a signal by using the first direct voltage, and wherein the control circuit is configured to control the memory cell by using the second direct voltage. - View Dependent Claims (11, 12, 13, 14, 15, 16)
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17. A semiconductor device comprising:
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a first antenna circuit; a second antenna circuit; a first power supply circuit; a second power supply circuit; and a memory circuit comprising a memory cell for holding a signal by using an output voltage from the first power supply circuit and a control circuit for controlling the memory cell by using an output voltage from the second power supply circuit, wherein the first power supply circuit is configured to generate a first direct voltage from a first radio signal received by the first antenna circuit, wherein the second power supply circuit is configured to generate a second direct voltage from a second radio signal received by the second antenna circuit, and wherein when the output voltage from the second power supply circuit is larger than the output voltage from the first power supply circuit, the memory cell is configured to hold the signal by using the output voltage from the second power supply circuit. - View Dependent Claims (18, 19, 20, 21, 22, 23)
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24. A semiconductor device comprising:
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a first antenna circuit; a second antenna circuit; a first power supply circuit; a second power supply circuit; and a memory circuit, wherein the first power supply circuit is configured to generate a first direct voltage by converting a first radio signal received by the first antenna circuit into a direct voltage and boosting the direct voltage, wherein the second power supply circuit is configured to generate a second direct voltage from a second radio signal received by the second antenna circuit, and wherein the memory circuit is configured to operate by using the second direct voltage and to hold data by using the first direct voltage. - View Dependent Claims (25, 26, 27, 28, 29, 30)
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Specification