Method and system for a mobile architecture that supports a cellular or wireless network and broadcast utilizing an integrated single chip cellular and broadcast silicon solution

• US 7,881,747 B2
• Filed: 08/30/2007
• Issued: 02/01/2011
• Est. Priority Date: 12/13/2004
• Status: Active Grant

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: van Rooyen, Pieter
• Primary Examiner(s): Le; Thanh C
• Application Number:
  US11/847,905
• Publication Number:
  US 20080045264A1
• Time in Patent Office: 1,251 Days
• Field of Search: 455/426.1, 455/73, 455/76, 455/550.1, 455/552.1, 455/553.1, 455/575.1, 455/130, 455/179.1, 455/188.1, 455/188.2, 455/188.3
• US Class Current: 455/552.1
• CPC Class Codes: H04H 20/57 for mobile receivers
• CPC Class Codes: H04H 20/72 of terrestrial networks
• CPC Class Codes: H04H 40/18 Arrangements characterised by circuits or components specially adapted for receiving
• CPC Class Codes: H04H 60/91 Mobile communication networks for accessing the Internet H04H60/85
• CPC Class Codes: H04N 21/235 Processing of additional data, e.g. scrambling of additional data or processing content descriptors
• CPC Class Codes: H04N 21/435 Processing of additional data, e.g. decrypting of additional data, reconstructing software from modules extracted from the transport stream
• CPC Class Codes: H04W 88/06 adapted for operation in multiple networks or having at least two operational modes, e.g. multi-mode terminals

Abstract

In an RF communication system, aspects for supporting cellular or wireless network and broadcast utilizing an integrated single chip cellular and broadcast silicon solution may include communicating data, within a mobile terminal, between a single baseband processor integrated circuit (BBPIC) and a plurality of receiver front ends via a channel interface, for example, a serial bus. The plurality of receiver front ends may comprise a cellular receiver front end and a VHF/UHF broadcast receiver front end. The BBPIC may communicate with one or more processors, for example, a CPU and/or DSP, via the processor interface, for example, an AMBA bus. The BBPIC may also communicate with a power management unit via a control interface, for example, an I2C bus, with memory devices via a memory interface, for example, a serial random access memory bus, and/or with peripheral devices via a peripheral interface, for example, a serial bus. The peripheral interface may comprise a wireless LAN interface, USIM interface, and/or a Bluetooth interface.

Claims

1. A system for communicating with a plurality of communications networks, the system comprising:

a mobile terminal comprising;

a single baseband processor integrated circuit (BBPIC) within said mobile terminal that is coupled to a plurality of receiver front ends via a channel interface, wherein at least one of said plurality of receiver front ends comprises a cellular receiver front end and at least one of said plurality of receiver front ends comprises a VHF/UHF broadcast receiver front end;

a processor interface coupled to said single BBPIC;

a control interface coupled to said single BBPIC;

at least one memory device coupled to said single BBPIC via a memory interface; and

peripheral devices coupled to said single BBPIC via a peripheral interface.

2. The system according to claim 1, wherein said channel interface comprises at least one serial bus.

3. The system according to claim 1, wherein said processor interface comprises an advanced microcontroller bus architecture (AMBA) bus.

4. The system according to claim 1, comprising at least one central processing unit (CPU) coupled to said single BBPIC via said processor interface.

5. The system according to claim 1, comprising at least one digital signal processor (DSP) coupled to said single BBPIC via said processor interface.

6. The system according to claim 1, wherein said memory interface comprises a serial random access memory (SRAM) bus.

7. The system according to claim 1, wherein said peripheral interface comprises a serial bus.

8. The system according to claim 1, comprising a plurality of user interfaces coupled to said single BBPIC via said peripheral interface.

9. The system according to claim 1, comprising a wireless local area network (WLAN) interface coupled to said single BBPIC via said peripheral interface.

10. The system according to claim 1, comprising a universal subscriber identity module (USIM) interface coupled to said single BBPIC via said peripheral interface.

11. The system according to claim 1, comprising a Bluetooth interface coupled to said single BBPIC via said peripheral interface.

12. The system according to claim 1, comprising a power management unit coupled to said single BBPIC via said control interface.

13. The system according to claim 1, wherein said control interface comprises an inter-integrated circuit (I2C) bus.

14. A method for communicating with a plurality of communications networks, the method comprising:

communicating, within a mobile terminal, data between a single baseband processor integrated circuit (BBPIC) and a plurality of receiver front ends via a channel interface, wherein at least one of said plurality of receiver front ends comprises a cellular receiver front end and at least one of said plurality of receiver front ends comprises a VHF/UHF broadcast receiver front end;

communicating data between one or more processors and said single BBPIC via a processor interface;

communicating data between one or more power management units and said single BBPIC via a control interface;

communicating data between one or more memory devices and said single BBPIC via a memory interface; and

communicating data between one or more peripheral devices and said single BBPIC via a peripheral interface.

15. The method according to claim 14, wherein said channel interface comprises at least one serial bus.

16. The method according to claim 14, wherein said processor interface comprises an advanced microcontroller bus architecture (AMBA) bus.

17. The method according to claim 14, wherein said one or more processors comprise at least one central processing unit and/or at least one digital signal processor.

18. The method according to claim 14, wherein said memory interface comprises a serial random access memory bus.

19. The method according to claim 14, wherein said peripheral interface comprises a serial bus.

20. The method according to claim 14, comprising communicating data between a plurality of user interfaces and said single BBPIC via said peripheral interface.

21. The method according to claim 20, wherein said plurality of user interfaces comprise one or more of a wireless local area network interface, universal subscriber identity module (USIM) interface, and a Bluetooth interface.

22. The method according to claim 14, wherein said control interface comprises an inter-integrated circuit (I2C) bus.