Technique for patterning differently stressed layers formed above transistors by enhanced etch control strategies

• US 7,883,629 B2
• Filed: 10/08/2007
• Issued: 02/08/2011
• Est. Priority Date: 02/28/2007
• Status: Expired due to Fees

• Current Assignee: GlobalFoundries, Inc.
• Original Assignee: GlobalFoundries, Inc.
• Inventors: Richter, Ralf, Salz, Heike, Mattick, Sylvio, Schaller, Matthias
• Primary Examiner(s): Ahmed; Shamim
• Assistant Examiner(s): Lin; Patti
• Application Number:
  US11/868,789
• Publication Number:
  US 20080206905A1
• Time in Patent Office: 1,219 Days
• Field of Search: 216/58, 216/13, 438/6, 438/7, 438/8, 438/14, 438/16, 438/142, 438/309, 438/584, 438/758, 438/689
• US Class Current: 216/58
• CPC Class Codes: H01L 21/823412 with a particular manufacturing method of the channel structures, e.g. channel implants, halo or pocket implants, or channel materials
• CPC Class Codes: H01L 21/823425 manufacturing common source or drain regions between a plurality of conductor-insulator-semiconductor structures
• CPC Class Codes: H01L 21/823807 with a particular manufacturing method of the channel structures, e.g. channel implants, halo or pocket implants, or channel materials
• CPC Class Codes: H01L 21/84 the substrate being other than a semiconductor body, e.g. being an insulating body
• CPC Class Codes: H01L 22/26 Acting in response to an ongoing measurement without interruption of processing, e.g. endpoint detection, in-situ thickness measurement endpoint detection arrangements in CMP apparatus B24B37/013, in discharge apparatus H01J37/32
• CPC Class Codes: H01L 29/7843 the means being an applied insulating layer

Abstract

During the patterning of stressed layers having different types of intrinsic stress, the effects of the deposition of a silicon dioxide based etch indicator material between the first and second dielectric layers may be significantly reduced by a controlled etch on the basis of optical measurement data indicating the etch rate and, thus, the performance of the respective etch process. In other cases, highly efficient etch indicator species may be incorporated into the stressed dielectric layers or may be formed on a surface portion thereof with reduced layer thickness, thereby providing an enhanced endpoint detection signal without creating the negative effects of silicon dioxide based indicator layers. In one illustrative embodiment, a stressed silicon, nitrogen and carbon-containing layer may be combined with a stressed silicon and nitrogen-containing layer, wherein the carbon species provides a prominent endpoint detection signal.

Claims

1. A method, comprising:

forming a first stress-inducing layer above a first transistor and a second transistor, said first and second transistors formed above a first substrate;

removing a portion of said first stress-inducing layer located above said second transistor;

forming a second stress-inducing layer on said first stress-inducing layer and above a measurement site;

removing a first portion of said second stress-inducing layer from above said first transistor on the basis of an etch process;

forming a test structure including a grating pattern at said measurement site by etching a second portion of said second stress-inducing layer to define said grating pattern; and

controlling at least one parameter of said etch process on the basis of optical measurement data collected from said grating pattern at said measurement site, said optical measurement data indicating an etch rate of said etch process.

2. The method of claim 1, further comprising controlling said etch process on the basis of measurement data indicating a layer thickness of said second stress-inducing layer.

3. The method of claim 1, further comprising forming an etch stop layer above said first and second transistors prior to forming said first stress-inducing layer.

4. The method of claim 1, wherein said first and second stress-inducing layers are comprised of silicon nitride.

5. The method of claim 1, further comprising forming a dielectric material above said first and second transistors after said etch process, and forming contacts in said dielectric material using said first and second stress-inducing layers as an etch stop.

6. The method of claim 1, wherein said at least one parameter comprises an etch time of said etch process.

7. The method of claim 1, wherein controlling at least one parameter comprises using a model of said etch process and estimating an updated value for said at least one parameter on the basis of said model and said optical measurement data.

8. The method of claim 1, wherein forming said test structure including said grating pattern at said measurement site further comprises etching a series of alternating lines and spaces in said second stress-inducing layer.

9. The method of claim 1, wherein forming said test structure including said grating pattern at said measurement site further comprises:

etching a plurality of lines in said first stress-inducing layer;

forming said second stress-inducing layer over said plurality of lines; and

etching portions of said second stress-inducing layer between adjacent lines during said etch process.

10. The method of claim 1, wherein controlling said etch time comprises monitoring a thickness of said second stress-inducing layer to obtain said optical measurement data when etching said second stress-inducing layer.

11. The method of claim 10, wherein monitoring a thickness of said second stress-inducing layer comprises performing an interferometric measurement process.

12. The method of claim 1, wherein said test structure is formed based on said first and second stress-inducing layers above a second substrate and said optical measurement data is obtained by a scatterometry measurement process performed on said test structure.

13. The method of claim 12, wherein forming said test structure comprises patterning one of said first and second stress-inducing layers to form said grating pattern.

14. The method of claim 12, further comprising obtaining further optical measurement data from said test structure, said further optical measurement data indicating at least a thickness of said second stress-inducing layer prior to performing said etch process.

15. The method of claim 1, further comprising providing a specified atomic species in one of the first and second stress-inducing layers and controlling said etch process further on the basis of an optical signal obtained from said specified atomic species during said etch process.

16. The method of claim 15, wherein said atomic species comprises carbon.

17. The method of claim 16, wherein said second stress-inducing layer comprises said carbon and has intrinsic compressive stress.

18. The method of claim 16, wherein said first stress-inducing layer comprises said carbon and has intrinsic compressive stress.