Voltage converter
First Claim
1. A voltage converter, comprising:
- a pulse width modulation controller chip comprising;
a plurality of pins, the plurality of pins comprise a Vcc pin connected to a first power supply, a BOOT pin connected to the Vcc pin via a diode for receiving power from the first power supply, a PHASE pin acting as a multi-function pin and connected to the BOOT pin via a capacitor, a UGATE pin, a LGATE pin, and a GND pin that is grounded;
a gate control logic circuit for outputting a first drive signal and a second drive signal that is the inverse of the first drive signal;
a power management circuit for generating a power-on reset signal to enable the gate control logic circuit when the pulse width modulation controller chip is enabled;
a first gate driver comprising an input terminal for receiving the first drive signal, a positive power supply terminal connected to the BOOT pin, a negative power supply terminal connected to the PHASE pin, and an output terminal for outputting a third drive signal corresponding to the first drive signal;
a second gate driver comprising an input terminal for receiving the second drive signal, a positive power supply terminal connected to the Vcc pin, a negative power supply terminal connected to the GND pin, and an output terminal for outputting a fourth drive signal corresponding to the second drive signal, the fourth drive signal is the inverse of the third drive signal;
a current source connected to a first node which is also connected to the cathode of a zener diode, and the anode of the zener diode is grounded;
a first resistor with one terminal connected to the first node, and the other terminal connected the PHASE pin;
an inductor current sensor for detecting a first current flowing through the first node;
a counter and current step generator for generating a control signal when the voltage converter is in a discontinuous current mode according to the first current; and
an oscillator for reducing a frequency outputted to signal the gate control logic circuit to reduce frequencies of the first and second drive signal in response to the control signal;
a pull-up transistor comprising a gate connected to the UGATE pin for receiving the third drive signal, a source connected to a second power supply, and a drain connected to the PHASE pin;
a pull-down transistor comprising a drain connected to the PHASE pin, a gate connected to the LGATE pin for receiving the fourth drive signal, and a source that is grounded; and
a low pass filter comprising an input terminal connected to the PHASE pin, and an output terminal serving as an output terminal of the voltage converter;
wherein the gate control logic circuit generates the first and second drive signals for the first and second gate driver to respectively switch on or off the pull-up transistor and the pull-down transistor.
1 Assignment
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Accused Products
Abstract
An exemplary voltage converter includes a pulse width modulation controller chip, a pull-up transistor, a pull-down transistor, and a low pass filter. The pulse width modulation controller chip includes a plurality of pins, a power management circuit, a gate control logic circuit, a first gate driver, a second gate driver, a current source, a first resistor, an inductor current sensor, a counter and current step generator, and an oscillator. The plurality of pins include a Vcc pin, a BOOT pin, a PHASE pin, a UGATE pin, a LGATE pin, and a GND pin. The PHASE pin serves as a multi-function pin in the pulse width modulation controller chip. The current source, the first resistor, the inductor current sensor, the counter and current step generator, the oscillator, and the pull-down transistor constitute a light-load efficiency improvement circuit.
43 Citations
6 Claims
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1. A voltage converter, comprising:
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a pulse width modulation controller chip comprising; a plurality of pins, the plurality of pins comprise a Vcc pin connected to a first power supply, a BOOT pin connected to the Vcc pin via a diode for receiving power from the first power supply, a PHASE pin acting as a multi-function pin and connected to the BOOT pin via a capacitor, a UGATE pin, a LGATE pin, and a GND pin that is grounded; a gate control logic circuit for outputting a first drive signal and a second drive signal that is the inverse of the first drive signal; a power management circuit for generating a power-on reset signal to enable the gate control logic circuit when the pulse width modulation controller chip is enabled; a first gate driver comprising an input terminal for receiving the first drive signal, a positive power supply terminal connected to the BOOT pin, a negative power supply terminal connected to the PHASE pin, and an output terminal for outputting a third drive signal corresponding to the first drive signal; a second gate driver comprising an input terminal for receiving the second drive signal, a positive power supply terminal connected to the Vcc pin, a negative power supply terminal connected to the GND pin, and an output terminal for outputting a fourth drive signal corresponding to the second drive signal, the fourth drive signal is the inverse of the third drive signal; a current source connected to a first node which is also connected to the cathode of a zener diode, and the anode of the zener diode is grounded; a first resistor with one terminal connected to the first node, and the other terminal connected the PHASE pin; an inductor current sensor for detecting a first current flowing through the first node; a counter and current step generator for generating a control signal when the voltage converter is in a discontinuous current mode according to the first current; and an oscillator for reducing a frequency outputted to signal the gate control logic circuit to reduce frequencies of the first and second drive signal in response to the control signal; a pull-up transistor comprising a gate connected to the UGATE pin for receiving the third drive signal, a source connected to a second power supply, and a drain connected to the PHASE pin; a pull-down transistor comprising a drain connected to the PHASE pin, a gate connected to the LGATE pin for receiving the fourth drive signal, and a source that is grounded; and a low pass filter comprising an input terminal connected to the PHASE pin, and an output terminal serving as an output terminal of the voltage converter; wherein the gate control logic circuit generates the first and second drive signals for the first and second gate driver to respectively switch on or off the pull-up transistor and the pull-down transistor. - View Dependent Claims (2, 3, 4, 5, 6)
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Specification