Controllable amplifier and the use thereof

• US 7,889,005 B2
• Filed: 02/21/2006
• Issued: 02/15/2011
• Est. Priority Date: 02/23/2005
• Status: Expired due to Fees

• Current Assignee: Intel Deutschland GmbH (Intel Corporation)
• Original Assignee: Infineon Technologies AG
• Inventors: Simon, Martin
• Primary Examiner(s): Nguyen; Hieu P
• Application Number:
  US11/358,623
• Publication Number:
  US 20060202760A1
• Time in Patent Office: 1,820 Days
• Field of Search: 330/252, 330/254, 330/260, 330/285
• US Class Current: 330/254
• CPC Class Codes: H03F 1/223 with MOSFET's
• CPC Class Codes: H03F 1/26 Modifications of amplifiers to reduce influence of noise generated by amplifying elements
• CPC Class Codes: H03F 2200/372 Noise reduction and elimination in amplifier
• CPC Class Codes: H03F 2200/451 the amplifier being a radio frequency amplifier
• CPC Class Codes: H03F 2200/453 Controlling being realised by adding a replica circuit or by using one among multiple identical circuits as a replica circuit
• CPC Class Codes: H03F 2200/456 A scaled replica of a transistor being present in an amplifier
• CPC Class Codes: H03F 2203/45024 the differential amplifier amplifying transistors are cascode coupled transistors
• CPC Class Codes: H03F 2203/45052 the cascode stage of the cascode differential amplifier being controlled by a controlling signal, which controlling signal can also be the input signal
• CPC Class Codes: H03F 2203/45311 the common gate stage of a cascode dif amp being implemented by multiple transistors
• CPC Class Codes: H03F 2203/45398 the AAC comprising a voltage generating circuit as bias circuit for the AAC
• CPC Class Codes: H03F 2203/45544 the IC comprising one or more capacitors, e.g. coupling capacitors
• CPC Class Codes: H03F 3/195 in integrated circuits
• CPC Class Codes: H03F 3/245 with semiconductor devices only
• CPC Class Codes: H03F 3/45188 Non-folded cascode stages
• CPC Class Codes: H03F 3/45201 Non-folded cascode stages
• CPC Class Codes: H03G 1/0029 using FETs
• CPC Class Codes: H03G 1/007 using FET type devices

Abstract

A controllable amplifier amplifies a radiofrequency input signal on the basis of a control signal. A current path is formed between a supply potential connection and a reference potential connection. The current path includes an amplifier transistor and a cascode transistor, the cascode transistor being connected to the input for supplying the control signal. The output power of the amplifier is controlled using the cascode transistor, as a result of which a low power consumption is achieved in conjunction with good noise properties.

Claims

1. A controllable amplifier comprising:

a first input configured to receive a radiofrequency input signal;

a second input configured to receive an analog control signal for gain;

an output; and

a current path connected between a supply potential connection and a reference potential connection, wherein the current path comprises;

an amplifier transistor having a first connection coupled to the reference potential connection, a second connection, and a control input coupled to the first input;

a cascode transistor having a control input coupled to the second input, a first connection coupled to the second connection of the amplifier transistor, and a second connection coupled to the output, wherein the cascode transistor is configured to operate over a plurality of different, non-zero gains in an analog fashion based on the analog control signal provided at the control input thereof, wherein the analog control signal is operable to adjust the gain of the cascode transistor in the analog fashion;

an auxiliary current path comprising a first auxiliary transistor, a second auxiliary transistor, an output, and a feedback path, wherein the first auxiliary transistor comprises a control input, the second auxiliary transistor comprises a control input, and the first auxiliary transistor and the second auxiliary transistor are connected in series;

wherein the control input of the first auxiliary transistor is connected to the control input of the amplifier transistor;

wherein the output of the auxiliary current path is connected to a first connection of the second auxiliary transistor; and

wherein the feedback path of the auxiliary current path is connected to the output of the auxiliary current path and the second input.

2. The controllable amplifier of claim 1, further comprising an electrical load connected to the supply potential connection and the second connection of the cascode transistor.

3. The controllable amplifier of claim 1, further comprising a means for supplying a bias signal connected to the control input of the amplifier transistor.

4. The controllable amplifier of claim 3, wherein the means for supplying the bias signal comprises a current mirror having an input transistor connected to a current source and the amplifier transistor.

5. The controllable amplifier of claim 3, wherein the means for supplying the bias signal comprises

a coupling-in element that couples the control input of the amplifier transistor to the first input.

6. The controllable amplifier of claim 5, wherein the coupling-in element is connected to an input transistor and the control input of the amplifier transistor.

7. The controllable amplifier of claim 1, further comprising a means for supplying a bias signal arranged in the current path and connected to the first connection of the amplifier transistor.

8. The controllable amplifier of claim 1, wherein the radiofrequency input signal is a differential signal and the output provides an output signal as a differential signal.

9. A controllable amplifier comprising:

first and second amplifier transistors having inputs configured to receive a differential input signal, and first and second connections;

first and second cascode transistors having inputs configured to receive a respective one of an analog differential control signal, and first and second connections, wherein the differential input signal is independent of the respective one of the analog differential control signal;

wherein the first connection of the first amplifier transistor is connected to the second connection of the first cascode transistor and the first connection of the second amplifier transistor is connected to the second connection of the second cascode transistor; and

wherein the first connection of the first cascode amplifier transistor and the first connection of the second cascode amplifier transistor provide a differential output signal, wherein the first and second cascode transistors are configured to operate over a plurality of different, non-zero gains in an analog fashion based on the analog differential control signal, wherein the analog differential control signal is operable to adjust the gain of the first and second cascode transistors in the analog fashion.

10. The controllable amplifier of claim 9, further comprising a load having a first terminal connected to the first connection of the first cascode amplifier transistor and the first connection of the second cascode amplifier transistor and a second terminal connected to a supply potential connection.

11. The controllable amplifier of claim 9, wherein the differential input signal includes a bias signal.

12. The controllable amplifier of claim 11, further comprising a current mirror that generates the bias signal.

13. The controllable amplifier of claim 11, further comprising a coupling-in element that generates the bias signal.

14. A controllable amplifier comprising:

a plurality of amplifier transistors that receive an input signal and generate an amplified input signal; and

a plurality of cascode transistors, wherein each of the plurality of cascode transistors is connected to a respective one of the plurality of amplifier transistors, that respectively receive the amplified input signal from the respective one of the plurality of amplifier transistors and one portion of an analog differential control signal, and wherein the plurality of cascode transistors are operable over a plurality of different, non-zero gains, and generate an output signal in an analog fashion in response thereto, and wherein the differential control signal is operable to adjust the gain of the plurality of cascode transistors in the analog fashion; and

wherein the output signal has an output power according to the differential control signal; and

wherein the differential control signal is adjusted to a voltage potential that mitigates noise.

15. The controllable amplifier of claim 14, wherein the input signal is a radio frequency input signal.

16. The controllable amplifier of claim 14, further comprising a means for connecting an electrical load to the one or more cascode transistors.

17. The controllable amplifier of claim 14, wherein the output signal also has a gain value according to the differential control signal.

18. A controllable amplifier comprising:

a current mirror to generates a bias signal;

first and second amplifier transistors having inputs configured to receive a differential input signal that includes the bias signal, and first and second connections;

first and second cascode transistors having inputs configured to receive a respective one of an analog differential control signal, and first and second connections;

wherein the first connection of the first amplifier transistor is connected to the second connection of the first cascode transistor and the first connection of the second amplifier transistor is connected to the second connection of the second cascode transistor; and

wherein the first connection of the first cascode amplifier transistor and the first connection of the second cascode amplifier transistor provide a differential output signal, wherein the first and second cascode transistors are configured to operate over a plurality of different, non-zero gains in an analog fashion based on the analog differential control signal, wherein the analog differential control signal is operable to adjust the gain of the first and second cascode transistors in the analog fashion.