Apparatus and method for in-line insertion and removal of markers

• US 7,889,762 B2
• Filed: 01/19/2007
• Issued: 02/15/2011
• Est. Priority Date: 01/19/2006
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel-Ne, Inc
• Inventors: Hausauer, Brian S., Keels, Kenneth G., Carlson, Jeff M., Maguire, David J.
• Primary Examiner(s): Trost, IV; William
• Assistant Examiner(s): Liu; Siming
• Application Number:
  US11/624,849
• Publication Number:
  US 20080043750A1
• Time in Patent Office: 1,488 Days
• Field of Search: 370/464, 370/474, 709/250, 714/699, 714/746, 714/752, 714/758
• US Class Current: 370/474
• CPC Class Codes: H04L 49/90 Buffering arrangements
• CPC Class Codes: H04L 49/9094 Arrangements for simultaneous transmit and receive, e.g. simultaneous reading/writing from/to the storage element
• CPC Class Codes: H04L 67/02 based on web technology, e.g. hypertext transfer protocol [HTTP]
• CPC Class Codes: H04L 69/12 Protocol engines

Abstract

An apparatus is provided, for performing a direct memory access (DMA) operation between a host memory in a first server and a network adapter. The apparatus includes a host frame parser and a protocol engine. The host frame parser is configured to receive data corresponding to the DMA operation from a host interface, and is configured to insert markers on-the-fly into the data at a prescribed interval and to provide marked data for transmission to a second server over a network fabric. The protocol engine is coupled to the host frame parser. The protocol engine is configured to direct the host frame parser to insert the markers, and is configured to specify a first marker value and an offset value, whereby the host frame parser is enabled to locate and insert a first marker into the data.

Claims

1. An apparatus comprising:

an adapter to be comprised in a first server and being capable of performing remote direct memory access (RDMA) operations involving a second server, the adapter comprising;

ports to receive one or more frames from the second server via a network; and

logic coupled to the ports, the logic to be coupled via a host interface to a plurality of central processing units and to host memory, the plurality of central processing units and the host memory being comprised in the first server, the logic also being to couple a protocol engine, the ports, and adapter memory, the protocol engine being comprised in the adapter, the host memory being to include an RDMA-enabled adapter driver to control the adapter, the logic being to communicate with the driver via the host interface, the driver being called, when one of the central processing units initiates a data transfer from the host memory to the second server via the network, to accomplish the data transfer;

the adapter being to perform a stateless cyclic redundancy check (CRC) validation of a received transport control protocol (TCP) segment from the one or more frames prior to associated data from the segment being placed into the host memory, the adapter being to determine whether the TCP segment includes an RDMA framed protocol data unit, the adapter also being to determine, if the TCP segment does not include the RDMA protocol data unit, whether the TCP segment belongs to an accelerated TCP connection, and the adapter being to determine whether to perform an additional CRC-related operation related to the TCP segment based at least in part upon whether the TCP segment includes the RDMA protocol data unit and belongs to the accelerated TCP connection, the additional CRC-related operation being in addition to the CRC validation.

2. The apparatus of claim 1, wherein:

the adapter is to perform the CRC validation concurrently with arrival at the adapter of the TCP segment; and

the adapter also comprises one or more media access controllers coupled to the ports.

3. The apparatus of claim 1, wherein:

the adapter is to perform the validation prior to determining a corresponding connection context for said TCP segment.

4. The apparatus of claim 1, wherein:

the validation involves more than one speculative CRC check of said TCP segment.

5. The apparatus of claim 1, wherein:

the validation comprises a plurality of marker protocol data unit alignment (MPA) CRC validations.

6. The apparatus of claim 1, wherein:

the adapter further comprises a host frame parser to receive direct memory access (DMA) data corresponding to a DMA operation from the host memory to the adapter via the host interface, the host frame parser also being to insert a marker on-the-fly into the DMA data at a prescribed interval, the adapter being to provide marked data for transmission to the second server via the network; and

the protocol engine is coupled to the host frame parser and is to direct the host frame parser to insert the marker, the protocol engine also being to specify a first marker value and an offset value to the host frame parser.

7. The apparatus of claim 6, wherein:

the marker comprises a 4-byte marker protocol data unit aligned (MPA) protocol marker according to MPA protocol;

the first marker value indicates a corresponding MPA header in a TCP byte stream; and

wherein the offset value specifies a number of bytes from a beginning of the DMA data for placement of the first marker value.

8. The apparatus of claim 6, wherein:

the host frame parser comprises marker insertion logic to insert the first marker value into the DMA data, and also to insert one or more subsequent markers, if required, into the DMA data according to a prescribed interval.

9. The apparatus of claim 1, wherein:

the adapter further comprises a host frame parser to receive marked data received from the second server via the network, and to remove markers on-the-fly from the marked data at a prescribed interval; and

the protocol engine is coupled to the host frame parser and is to direct the host frame parser to remove the markers, the protocol engine also being to specify an offset value to the host frame parser to enable location and removal a first marker from the marked data.

10. The apparatus of claim 1, wherein:

the host memory is to comprise a transmission control protocol/internet protocol (TCP/IP) stack to perform TCP/IP processing for an unaccelerated TCP connection; and

the adapter is capable of delivering the TCP segment to the stack for the TCP/IP processing if the TCP segment belongs to the unaccelerated connection.

11. The apparatus of claim 9, wherein:

the markers comprise 4-byte marker protocol data unit aligned (MPA) markers according to MPA protocol;

the first marker indicates a corresponding MPA header in a TCP byte stream; and

the offset value specifies a number of bytes from a beginning of the marked data to the first marker.

12. A method comprising:

receiving at ports one or more frames from a second server via a network, the ports being comprised in an adapter, the adapter to be comprised in a first server and being capable of performing remote direct memory access (RDMA) operations involving the second server, the adapter also comprising logic coupled to the ports, the logic to be coupled via a host interface to a plurality of central processing units and to host memory, the plurality of central processing units and the host memory being comprised in the first server, the logic also being to couple a protocol engine, the ports, and adapter memory, the protocol engine being comprised in the adapter, the host memory being to include an RDMA-enabled adapter driver to control the adapter, the logic being to communicate with the driver via the host interface, the driver being called, when one of the central processing units initiates a data transfer from the host memory to the second server via the network, to accomplish the data transfer;

the adapter being to perform a stateless cyclic redundancy check (CRC) validation of a received transport control protocol (TCP) segment from the one or more frames prior to associated data from the segment being placed into the host memory, the adapter being to determine whether the TCP segment includes an RDMA framed protocol data unit, the adapter also being to determine, if the TCP segment does not include the RDMA protocol data unit, whether the TCP segment belongs to an accelerated TCP connection, and the adapter being to determine whether to perform an additional CRC-related operation related to the TCP segment based at least in part upon whether the TCP segment includes the RDMA protocol data unit and belongs to the accelerated TCP connection, the additional CRC-related operation being in addition to the CRC validation.

13. The method of claim 12, wherein:

the adapter is to perform the CRC validation concurrently with arrival at the adapter of the TCP segment; and

the adapter also comprises one or more media access controllers coupled to the ports.

14. The method of claim 12, wherein:

the adapter is to perform the validation prior to determining a corresponding connection context for said TCP segment.

15. The method of claim 12, wherein:

the validation involves more than one speculative CRC check of said TCP segment.

16. The method of claim 12, wherein:

the validation comprises a plurality of marker protocol data unit alignment (MPA) CRC validations.

17. The method of claim 12, wherein:

the adapter further comprises a host frame parser to receive direct memory access (DMA) data corresponding to a DMA operation from the host memory to the adapter via the host interface, the host frame parser also being to insert a marker on-the-fly into the DMA data at a prescribed interval, the adapter being to provide marked data for transmission to the second server via the network; and

the protocol engine is coupled to the host frame parser and is to direct the host frame parser to insert the marker, the protocol engine also being to specify a first marker value and an offset value to the host frame parser.

18. The method of claim 17, wherein:

the marker comprises a 4-byte marker protocol data unit aligned (MPA) protocol marker according to MPA protocol;

the first marker value indicates a corresponding MPA header in a TCP byte stream; and

wherein the offset value specifies a number of bytes from a beginning of the DMA data for placement of the first marker value.

19. The method of claim 17, wherein:

the host frame parser comprises marker insertion logic to insert the first marker value into the DMA data, and also to insert one or more subsequent markers, if required, into the DMA data according to a prescribed interval.

20. The method of claim 12, wherein:

the adapter further comprises a host frame parser to receive marked data received from the second server via the network, and to remove markers on-the-fly from the marked data at a prescribed interval; and

the protocol engine is coupled to the host frame parser and is to direct the host frame parser to remove the markers, the protocol engine also being to specify an offset value to the host frame parser to enable location and removal a first marker from the marked data.

21. The method of claim 20, wherein:

the markers comprise 4-byte marker protocol data unit aligned (MPA) markers according to MPA protocol;

the first marker indicates a corresponding MPA header in a TCP byte stream; and

the offset value specifies a number of bytes from a beginning of the marked data to the first marker.

22. The method of claim 12, wherein:

the host memory is to comprise a transmission control protocol/internet protocol (TCP/IP) stack to perform TCP/IP processing for an unaccelerated TCP connection; and

the adapter is capable of delivering the TCP segment to the stack for the TCP/IP processing if the TCP segment belongs to the unaccelerated connection.