Forward shifting of processor element processing for load balancing

• US 7,890,559 B2
• Filed: 12/22/2006
• Issued: 02/15/2011
• Est. Priority Date: 12/22/2006
• Status: Expired due to Fees

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Visegrady, Tamas, Sutter, Siegfried K. H., Fayad, Camil, Li, John K.
• Primary Examiner(s): Malzahn; David H
• Application Number:
  US11/615,587
• Publication Number:
  US 20080152127A1
• Time in Patent Office: 1,516 Days
• Field of Search: None
• US Class Current: 708/233
• CPC Class Codes: G06F 9/5083 Techniques for rebalancing the load in a distributed system

Abstract

A data processing system, which is particularly useful for carrying out modular multiplication, especially for cryptographic purposes, comprises a plurality of independent, serially connected processing elements which are provided with data in a cyclical fashion via a control mechanism that is capable of transferring data from a set of registers to earlier ones in the series of the serially connected processing elements, at the end of a predetermined number of cycles.

Claims

1. A data processing system comprising:

a plurality of independently serially connected processing elements having two phases of operation;

a plurality of registers for supplying data for processing by said independent processing elements; and

a control mechanism for supplying data from said registers to said plurality of processing elements, said control mechanism providing a process sequence for said processing elements to effectively transfer said data from said registers to said plurality of processing elements to distribute processing load among the plurality of processing elements.

2. The system of claim 1 in which said serially connected processing elements perform modular multiplication.

3. The system of claim 1 in which said serially connected processing elements are structured to carry out cryptographic operations.

4. The system of claim 1 in which said control mechanism is a finite state machine.

5. The system of claim 1 in which said process sequence produces a forward shifting of data to otherwise idle processing elements.

7. The method of claim 5 in which said serially connected processing elements perform modular multiplication.

6. A method for providing data to a plurality of independently serially connected data processing elements having two phases of operation, said method comprising controlling supply of data to said processing elements to provide a processing sequence for said processing elements which effectively transfers said data from said registers to said plurality of processing elements to distribute processing load among the plurality of processing elements.

8. The method of claim 6 in which said serially connected processing elements are structured to carry out cryptographic operations.

9. The method of claim 6 in which said control mechanism is a finite state machine.

10. The method of claim 6 in which said processing sequence produces a forward shifting of data to otherwise idle processing elements.