Random number generator
First Claim
1. A random number generator within a processor, comprising:
- an array of oscillators, wherein each oscillator operates at a different frequency and wherein the operating frequencies of each oscillator are not harmonically related, such that no integer multiple exists between the frequencies of any two oscillators;
an array of latches, wherein each latch receives an input from a separate oscillator, receives a sample signal, and produces an output signal of the oscillator in response to the sample signal; and
random number determination logic (“
RNDL”
), wherein the RNDL is at least configured to receive the output signals of the array of latches and generate a random number seed.
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Accused Products
Abstract
A random number generator, a method, and a computer program product are provided for producing a random number seed. Each oscillator within an array of oscillators operates at a different frequency. The operating frequencies of each oscillator are not harmonically related, such that no integer multiple exists between the frequencies of any two oscillators. In one embodiment, the outputs of the array of oscillators connect to a multiple input latch. The multiple input latch also receives a sample signal, which is a clock signal. The clock signal samples the outputs of the array of oscillators, and the multiple input latch in conjunction with the random number determination logic (“RNDL”) produces a digital output (0 or 1) for each oscillator within the array. The RNDL uses these digital outputs to create a random number seed.
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Citations
18 Claims
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1. A random number generator within a processor, comprising:
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an array of oscillators, wherein each oscillator operates at a different frequency and wherein the operating frequencies of each oscillator are not harmonically related, such that no integer multiple exists between the frequencies of any two oscillators; an array of latches, wherein each latch receives an input from a separate oscillator, receives a sample signal, and produces an output signal of the oscillator in response to the sample signal; and random number determination logic (“
RNDL”
), wherein the RNDL is at least configured to receive the output signals of the array of latches and generate a random number seed. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A method, in a processor, for producing a random number seed, comprising:
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configuring an array of oscillators so that each oscillator operates at a different frequency and wherein the operating frequencies of each oscillator are not harmonically related, such that no integer multiple exists between the frequencies of any two oscillators; coupling an array of latches to the array of oscillators so that each latch is coupled to a separate oscillator; generating a sample signal; transmitting the sample signal to the array of latches; in response to the sample signal, generating output signals from the array of oscillators; producing a random number seed from the output signals of the array of oscillators. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16, 17)
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18. A computer program product for producing a random number seed, with the computer program product having computer code stored in a computer storage medium for execution by a computer, wherein the computer program comprises:
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said computer code for configuring an array of oscillators so that each oscillator operates at a different frequency and wherein the operating frequencies of each oscillator are not harmonically related, such that no integer multiple exists between the frequencies of any two oscillators; said computer code for coupling an array of latches to the array of oscillators so that each latch is coupled to a separate oscillator; said computer code for generating a sample signal; said computer code for transmitting the sample signal to the array of latches; in response to the sample signal, said computer code for generating output signals from the array of oscillators; and said computer code for producing a random number seed from the output signals of the array of oscillators.
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Specification