Metal gate electrodes for replacement gate integration scheme

• US 7,892,911 B2
• Filed: 01/10/2008
• Issued: 02/22/2011
• Est. Priority Date: 01/10/2008
• Status: Expired due to Fees

• Current Assignee: Applied Materials Incorporated
• Original Assignee: Applied Materials Incorporated
• Inventors: Wood, Bingxi Sun, Chang, Chorng-Ping
• Primary Examiner(s): Le; Thao X
• Assistant Examiner(s): Ullah; Elias
• Application Number:
  US11/972,439
• Publication Number:
  US 20090179285A1
• Time in Patent Office: 1,139 Days
• Field of Search: 257/412, 257/E29.158, 438/206
• US Class Current: 438/206
• CPC Class Codes: H01L 21/28088 the final conductor layer next to the insulator being a composite, e.g. TiN
• CPC Class Codes: H01L 29/66545 using a dummy, i.e. replacement gate in a process wherein at least a part of the final gate is self aligned to the dummy gate
• CPC Class Codes: H01L 29/6659 with both lightly doped source and drain extensions and source and drain self-aligned to the sides of the gate, e.g. lightly doped drain [LDD] MOSFET, double diffused drain [DDD] MOSFET
• CPC Class Codes: H01L 29/7833 with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's for thin film transistors H01L29/78618

Abstract

Metal gate electrodes for a replacement gate integration scheme are described. A semiconductor device includes a substrate having a dielectric layer disposed thereon. A trench is disposed in the dielectric layer. A gate dielectric layer is disposed at the bottom of the trench and above the substrate. A gate electrode has a work-function-setting layer disposed along the sidewalls of the trench and above the gate dielectric layer at the bottom of the trench. The work-function-setting layer has a thickness at the bottom of the trench greater than the thickness along the sidewalls of the trench. A pair of source and drain regions is disposed in the substrate, on either side of the gate electrode.

Claims

1. A method for fabricating a semiconductor device, comprising:

providing a substrate having a dielectric layer disposed thereon;

forming a trench in said dielectric layer;

providing a gate dielectric layer at the bottom of said trench and above said substrate;

forming a first work-function-setting film of a gate electrode above said gate dielectric layer at the bottom of said trench, wherein said first work-function-setting film is further formed along the sidewalls of said trench, and wherein said first work-function-setting film has a thickness at the bottom of said trench approximately equal to its thickness along the sidewalls of said trench; and

forming a second work-function-setting film of said gate electrode above said first work-function-setting film at the bottom of said trench, wherein said second work-function-setting film is further formed adjacent to said first work-function-setting film along the sidewalls of said trench, and wherein said second work-function-setting film has a thickness at the bottom of said trench greater than its thickness adjacent to said first work-function-setting film along the sidewalls of said trench.

2. The method of claim 1, wherein forming said first work-function-setting film includes depositing said first work-function-setting film by an atomic layer deposition process, and wherein forming said second work-function-setting film includes depositing said second work-function-setting film by a physical vapor deposition process.

3. The method of claim 2, wherein said first work-function-setting film is formed to a thickness sufficiently thick to protect said gate dielectric layer during the forming of said second work-function-setting film, but sufficiently thin for said second work-function-setting film to contribute to the work-function of said gate electrode.

4. The method of claim 1, wherein providing said gate dielectric layer includes forming said gate dielectric layer prior to forming said trench, and wherein forming said trench includes exposing said gate dielectric layer.

5. The method of claim 1, wherein providing said gate dielectric layer includes forming said gate dielectric layer after forming said trench and prior to forming said first work-function-setting film, and wherein said gate dielectric layer is further formed along the sidewalls of said trench.

6. The method of claim 1, wherein said gate dielectric layer has a thickness in the range of 1-3 nanometers and comprises a hafnium oxide portion above a chemical silicon dioxide portion, wherein said first work-function-setting film comprises an atomic layer-deposited tantalum nitride layer having a thickness in the range of 1-2 nanometers, and wherein said second work-function-setting film comprises a physical vapor-deposited tantalum nitride layer having a thickness in the range of 4-6 nanometers.

7. The method of claim 1, wherein a fill metal layer fills the remainder of the trench, above said second work-function-setting film.