Low power isolation design for a multiple sourced power bus

• US 7,893,560 B2
• Filed: 09/12/2008
• Issued: 02/22/2011
• Est. Priority Date: 09/12/2008
• Status: Active Grant

• Current Assignee: Covidien LP (Medtronic Plc)
• Original Assignee: Nellcor Puritan Bennett LLC (Medtronic Plc)
• Inventors: Carter, Danis E.
• Primary Examiner(s): PALADINI, ALBERT WILLIAM
• Application Number:
  US12/210,017
• Publication Number:
  US 20100066431A1
• Time in Patent Office: 893 Days
• Field of Search: 307 64- 66, 713/300, 713/320
• US Class Current: 307/64
• CPC Class Codes: H02J 1/10 Parallel operation of dc sources
• CPC Class Codes: H02J 9/061 for DC powered loads

Abstract

A redundant power supply connected to a common load is provided. Each power supply is connected to the common load through a series of MOSFET pairs. Each MOSFET in a MOSFET pair is individually controlled to reduce power consumption as well as the need for heat sinks on discrete diodes. Moreover, by providing individually controllable MOSFETs the present invention is capable of switching between power supplies without shorting the power supplies or having a significant drop in bus voltage.

Claims

1. A system, comprising:

a first power supply operable to provide power to a load via a first isolation switch comprising at least two switching devices;

a second power supply operable to provide power to the load via a second isolation switch comprising at least two switching devices; and

a controller operable to independently control each switching device in the first and second isolation switches.

2. The system of claim 1, wherein the controller comprises a signal processor based circuit design having at least four outputs, wherein each output of the circuit is associated with and used to provide control signals to a different switching device.

3. The system of claim 1, wherein the at least two switching devices in the first and second isolation switches are MOSFETs.

4. The system of claim 3, wherein a first MOSFET associated with the first isolation switch comprises an intrinsic diode forward biased from the first power supply to the load and wherein a third MOSFET associated the second isolation switch comprises an intrinsic diode forward biased from the second power supply to the load.

5. The system of claim 4, wherein a second MOSFET associated with the first isolation switch comprises an intrinsic diode backward biased from the first power supply to the load and wherein a fourth MOSFET associated with the second isolation switch comprises an intrinsic diode backward biased from the second power supply to the load.

6. The system of claim 5, wherein the second MOSFET is between the first MOSFET and the first power supply and wherein the fourth MOSFET is between the third MOSFET and the second power supply.

7. The system of claim 1, further comprising a monitor circuit operable to monitor the first and second power supplies and their respective potential and provide a signal to the controller indicating the potential of each power supply.

8. The system of claim 7, wherein the first power supply is a primary power supply, wherein the second power supply is a backup power supply, and wherein upon receiving an indication from the monitor circuit that the first power supply has a decreasing potential the controller is operable to sequentially and discretely control the switching devices in the first and second isolation switches thereby causing the first power supply to discontinue providing power to the load and further causing the second power supply to provide power to the load.

9. The system of claim 8, wherein while the controller is sequentially and discretely controlling the switching devices power is provided to the load by both the first and second power supplies.

10. The system of claim 1, wherein the controller comprises at least one of firmware and a digital signal processor.

11. A method, comprising:

determining that a first power supply connected to a load via a first isolation switch and providing power to the load has a decreasing voltage, wherein the first isolation switch comprises at least two switching devices; and

independently controlling each switching device in the first isolation switch to cause power to be supplied to the load by a second power supply.

12. The method of claim 11, further comprising causing the first power supply to discontinue providing power to the load.

13. The method of claim 11, wherein the second power supply is connected to the load via a second isolation switch that comprises at least two switching devices.

14. The method of claim 13, further comprising independently controlling each switching device in the second isolation switch.

15. The method of claim 13, further comprising the steps:

switching a first switching device associated with the first isolation switch from an active to an inactive state;

switching a second switching device associated with the second isolation switch from an inactive to an active state;

switching a fourth switching device associated with the first isolation switch from an active to an inactive state; and

switching a third switching device associated with the second isolation switch from an inactive to an active state.

16. The method of claim 15, wherein the first switching device comprises an intrinsic diode forward biased from the first power supply to the load, wherein the third switching device comprises an intrinsic diode forward biased from the second power supply to the load, wherein the second switching device comprises an intrinsic diode backward biased from the first power supply to the load, and wherein the fourth switching device comprises an intrinsic diode backward biased from the second power supply to the load.

17. The method of claim 16, wherein the second switching device is between the first switching device and the first power supply and wherein the fourth switching device is between the third switching device and the second power supply.

18. The method of claim 13, wherein the at least two switching devices in the first and second isolation switches are MOSFETs.

19. The method of claim 11, wherein during the controlling step power is provided to the load by both the first and second power supplies.

20. A computer readable medium comprising processor executable instructions that, when executed, perform the method of claim 11.

21. A power consuming load operable to receive power from at least one of a first and second power supply, wherein the first and second power supplies are each separately operable to provide power to the load via a pair of switching devices, wherein an operational state of each switching device associated with each power supply is independently controlled by a controller.

22. The load of claim 21, wherein the controller comprises first, second, third, and fourth control outputs, wherein signals transmitted on the first control output are used to control the operational state of a first switching device associated with the first power supply, wherein signals transmitted on the second control output are used to control the operational state of a second switching device associated with the first power supply, wherein signals transmitted on the third control output are used to control the operational state of a third switching device associated with the second power supply, and wherein signals transmitted on the fourth control output are used to control the operational state of a fourth switching device associated with the second power supply.

23. The load of claim 21, wherein the first power supply comprises an AC power supply and the second power supply comprises a battery.

24. The load of claim 21, wherein the second power supply is in communication with a medical ventilator.