Down-conversion of an electromagnetic signal with feedback control

• US 7,894,789 B2
• Filed: 04/07/2009
• Issued: 02/22/2011
• Est. Priority Date: 04/16/1999
• Status: Expired due to Fees

• Current Assignee: ParkerVision, Inc.
• Original Assignee: ParkerVision, Inc.
• Inventors: Short, Robert T., Moses, Charley D. Jr., Young, Jamison L., Johnson, Martin R., Jensen, Jonathan S., Cook, Robert W., Rawlins, Gregory S., Bultman, Michael J., Sorrells, David F., Looke, Richard C., Rawlins, Michael W.
• Primary Examiner(s): Nguyen; Lee
• Application Number:
  US12/419,465
• Publication Number:
  US 20090318107A1
• Time in Patent Office: 686 Days
• Field of Search: 455/70, 455/118, 455/207, 455/209, 455/296, 455/307, 455313-314, 455/323, 455333-334, 455337-339, 327113-116, 329/315, 329/345, 329/347, 375/324, 375/328, 375/340
• US Class Current: 455/313
• CPC Class Codes: H03C 3/40 using two signal paths the outputs of which have a predetermined phase difference and at least one output being amplitude-modulated
• CPC Class Codes: H03D 3/006 by sampling the oscillations and further processing the samples, e.g. by computing techniques H03D3/007 takes precedence
• CPC Class Codes: H03D 7/00 Transference of modulation from one carrier to another, e.g. frequency-changing H03D9/00, H03D11/00 take precedence; dielectric amplifiers, magnetic amplifiers, parametric amplifiers used as a frequency-changers H03F
• CPC Class Codes: H04B 1/12 Neutralising, balancing, or compensation arrangements
• CPC Class Codes: H04B 1/123 using adaptive balancing or compensation means adaptive filter circuits and algorithms H03H
• CPC Class Codes: H04B 1/28 the receiver comprising at least one semiconductor device having three or more electrodes
• CPC Class Codes: H04B 1/30 for homodyne or synchrodyne receivers demodulator circuits H03D1/22

Abstract

Methods, systems, and apparatuses for down-converting an electromagnetic (EM) signal by aliasing the EM signal, and applications thereof are described herein. Reducing or eliminating DC offset voltages and re-radiation generated when down-converting an electromagnetic (EM) signal is also described herein. Down-converting a signal and improving receiver dynamic range is also described herein.

Claims

1. An apparatus for down-converting an electromagnetic signal, the apparatus comprising:

an energy transfer device configured to receive the electromagnetic signal and a control signal, to down-convert the electromagnetic signal based on the control signal, and to output a down-converted signal;

an analog-to-digital (A/D) converter configured to receive the down-converted signal and to generate a down-converted digital signal;

a state machine device configured to receive the down-converted digital signal and to compare the down-converted digital signal to a previous down-converted digital signal;

a digital-to-analog (D/A) converter configured to output an analog voltage signal based on the comparison of the down-converted digital signal to the previous down-converted digital signal;

a voltage controlled oscillator (VCO) configured to a generate a pulse signal based on the analog voltage signal; and

a pulse generator configured to generate aperture pulses in the control signal based on the pulse signal, wherein the aperture pulses are an input to a switch.

2. The apparatus of claim 1, wherein the energy transfer device comprises the switch and a storage element.

3. The apparatus of claim 1, wherein the switch comprises a field effect transistor (FET) and the aperture pulses control an “

on”

resistance of the FET.

4. The apparatus of claim 1, wherein the state machine device is configured to initialize the energy transfer signal device by

setting the D/A converter to a mid-range voltage value;

reading a digital value associated with an initial down-converted digital signal;

storing the digital value associated with the initial down-converted digital signal, wherein the initial down-converted digital signal represents the previous down-converted digital signal;

setting an increment flag for the D/A converter; and

incrementing a voltage setting of the D/A converter.

5. The apparatus of claim 1, wherein the state machine device is configured to decrement a voltage setting of the D/A converter if the digital value associated with the down-converted digital signal is less than the digital value associated with the previous down-converted digital signal and if an increment flag for the D/A converter is set.

6. The apparatus of claim 5, wherein the state machine device is configured to clear the increment flag and to replace the digital value associated with the previous down-converted signal with the digital value associated with the down-converted signal after the voltage setting of the D/A converter is decremented.

7. The apparatus of claim 1, wherein the state machine device is configured to decrement a voltage setting of the D/A converter if the digital value associated with the down-converted digital signal is greater than the digital value associated with the previous down-converted digital signal and if an increment flag for the D/A converter is not set.

8. The apparatus of claim 1, wherein the state machine device is configured to increment a voltage setting of the D/A converter if the digital value associated with the down-converted digital signal is less than the digital value associated with the previous down-converted digital signal and if an increment flag for the D/A converter is not set.

9. The apparatus of claim 8, wherein the state machine is configured to set the increment flag and to replace the digital value associated with the previous down-converted signal with the digital value associated with the down-converted signal after the voltage setting of the D/A converter is incremented.

10. The apparatus of claim 1, wherein the state machine device is configured to increment a voltage setting of the D/A converter if the digital value associated with the down-converted digital signal is greater than the digital value associated with the previous down-converted digital signal and if an increment flag for the D/A converter is set.

11. A method for down-converting an electromagnetic signal, the method comprising:

receiving the electromagnetic signal and a control signal;

down-converting the electromagnetic signal based on the control signal to generate a down-converted signal;

converting the down-converted signal to a down-converted digital signal;

comparing the down-converted digital signal to a previous down-converted digital signal;

generating an analog voltage signal based on the comparison of the down-converted digital signal to the previous down-converted digital signal;

generating a pulse signal based on the analog voltage signal; and

generating aperture pulses in the control signal based on the pulse signal, wherein the electromagnetic signal is down-converted based on the aperture pulses.

12. The method of claim 11, wherein comparing the down-converted digital signal to the previous down-converted digital signal comprises:

setting a D/A converter to a mid-range voltage value;

reading a digital value associated with an initial down-converted digital signal;

storing the digital value associated with the initial down-converted digital signal, wherein the initial down-converted digital signal represents the previous down-converted digital signal;

setting an increment flag for the D/A converter; and

incrementing a voltage setting of the D/A converter.

13. The method of claim 11, wherein comparing the down-converted digital signal to the previous down-converted digital signal comprises decrementing a voltage setting of the D/A converter if the digital value associated with the down-converted digital signal is less than the digital value associated with the previous down-converted digital signal and if an increment flag for the D/A converter is set.

14. The method of claim 13, wherein decrementing the voltage setting comprises clearing the increment flag and replacing the digital value associated with the previous down-converted signal with the digital value associated with the down-converted signal after the voltage setting of the D/A converter is decremented.

15. The method of claim 11, wherein comparing the down-converted digital signal to the previous down-converted digital signal comprises decrementing a voltage setting of the D/A converter if the digital value associated with the down-converted digital signal is greater than the digital value associated with the previous down-converted digital signal and if an increment flag for the D/A converter is not set.

16. The method of claim 11, wherein comparing the down-converted digital signal to the previous down-converted digital signal comprises incrementing a voltage setting of the D/A converter if the digital value associated with the down-converted digital signal is less than the digital value associated with the previous down-converted digital signal and if an increment flag for the D/A converter is not set.

17. The method of claim 16, wherein incrementing the voltage setting comprises setting the increment flag and replacing the digital value associated with the previous down-converted signal with the digital value associated with the down-converted signal after the voltage setting of the D/A converter is incremented.

18. The method of claim 11, wherein comparing the down-converted digital signal to the previous down-converted digital signal comprises incrementing a voltage setting of the D/A converter if the digital value associated with the down-converted digital signal is greater than the digital value associated with the previous down-converted digital signal and if an increment flag for the D/A converter is set.