Ensuring buffer availability

• US 7,895,390 B1
• Filed: 09/13/2004
• Issued: 02/22/2011
• Est. Priority Date: 05/25/2004
• Status: Expired due to Fees

• Current Assignee: Marvell Asia Pte Limited (Marvell Technology Group Limited)
• Original Assignee: QLogic Corporation (Marvell Technology Group Limited)
• Inventors: Olson, Dave
• Primary Examiner(s): Bragdon; Reginald G
• Assistant Examiner(s): Ruiz; Aracelis
• Application Number:
  US10/940,355
• Time in Patent Office: 2,353 Days
• Field of Search: 711/118
• US Class Current: 711/101
• CPC Class Codes: G06F 5/06 for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor G06F7/78 takes precedence

Abstract

A buffer availability manager ensures that buffers are available before processes write thereto. The buffer availability manager maintains a plurality of register sets corresponding to the plurality of buffers. Each register set comprises a status indicator and a generation counter. Prior to writing to a buffer, the corresponding register set is read. Data is written to an individual buffer only if the status indicator indicates that the buffer is not busy, and the current value of the generation counter is not equal to a stored value from a prior register set read. The buffer availability manager detects writing of data to the buffer, and in response updates the status indicator to indicate that the buffer is busy. After processing the data in the buffer, the buffer availability manager updates the status indicator to not busy, and updates the value of the generation counter.

Claims

1. A method for ensuring availability of buffers prior to writing thereto, the method comprising:

(a) maintaining a plurality of register sets at a computing device executing a plurality of processes, the plurality of register sets corresponding to a plurality of buffers located at another device, each register set including a status indicator and a generation counter both used to determine if a buffer is available for writing;

wherein the status indicator controlled by a buffer availability manager indicates if a buffer is busy or not busy; and

the generation counter is set by the buffer availability manager to a common default value during initialization, before the plurality of buffers are made available for writing to the plurality of processes;

(b) prior to writing to any buffer from among the plurality of buffers, a process from among the plurality of processes reading the plurality of register sets to find a buffer whose corresponding register set indicates that the buffer is not busy indicating that the buffer is available;

(c) after finding the buffer that is not busy, comparing a current value of the generation counter to a stored value of the generation counter that is maintained by the process;

wherein the process compares the current value to the stored value;

(d) writing data to the buffer (i) only if the status indicator for the buffer indicates that the buffer is not busy and (ii) if the current value of the generation counter is not equal to the stored value of the generation counter indicating that the generation counter has been updated since prior to a last write operation or if the process has not previously written data to the buffer, as determined by the process by maintaining an internal mechanism to indicate whether the buffer has been previously written;

wherein if the generation counter value has not changed since the last write operation, the process finds another buffer for writing data;

(e) in response to the writing of data to the buffer, updating the status indicator to indicate that the buffer is busy;

wherein the buffer availability manager updates the status indicator, and

(f) after processing the data in the buffer, updating the status indicator to indicate that the buffer is not busy, and updating the value of the generation counter to indicate that the buffer is again available for writing;

wherein the buffer availability manager updates the status indicator and the generation counter value.

2. The method of claim 1 wherein:

the register sets and buffers are located on the computing device.

3. The method of claim 1 wherein:

the register sets and the buffers are instantiated as part of an integrated circuit.

4. The method of claim 1 wherein:

the register sets and the buffers are instantiated in the other device.

5. A machine implemented method, comprising:

providing a plurality of buffers at a first device for writing data;

providing a plurality of register sets corresponding to the plurality buffers a second device executing a plurality of processes;

wherein each register set includes a status indicator and a generation counter both used to determine if a buffer from among the plurality of buffers is available for writing; and

wherein the status indicator controlled by a buffer availability manager indicates if a buffer is busy or not busy; and

the generation counter is set by the buffer availability manager to a common default value during initialization, before the plurality of buffers are made available for writing to the plurality of processes;

determining if the status indicator for any buffer indicates that the buffer is not busy;

wherein a process from among the plurality of processes, prior to writing to any buffer, reads the plurality of register sets to find a buffer whose corresponding register set indicates that the buffer is not busy;

maintaining a stored value for the generation counter of the register set corresponding to the buffer whose status indicator indicates that the buffer is not busy;

wherein the process maintains the stored value;

comparing a current value of the generation counter to the stored value to determine if the generation counter has been updated since a last write operation performed by the process;

wherein the process compares the current value to the stored value;

maintaining a mechanism to determine if the buffer has been written before by the process;

wherein the process maintains the mechanism;

writing data to the buffer if the status indicator for the buffer indicates that the buffer is not busy and if the current value of the generation counter is different from the stored value of the generation counter;

wherein if the generation counter value has not changed since the last write operation, the process finds another buffer for writing data;

in response to the writing of data to the buffer, updating the status indicator to indicate that the buffer is busy;

wherein the buffer availability manager updates the status indicator; and

after processing the data in the buffer, updating the status indicator to indicate that the buffer is not busy, and updating the value of the generation counter to indicate that the buffer is again available for writing;

wherein the buffer availability manager updates the status indicator and the generation counter value.

6. The method of claim 5, wherein data is written to the buffer if the status indicator for the buffer indicates that the buffer is not busy and if the process has not previously written data to the buffer, as determined by the mechanism.

7. The method of claim 5, wherein the plurality of buffers and the plurality of register sets are located at a same device.

8. The method of claim 5, wherein the buffer availability manager is executed by the first device.

9. The method of claim 5, wherein the buffer availability manager functionality is executed in hardware.

10. The method of claim 5, wherein the buffer availability manager functionality is executed by processor executable instructions.

11. The method of claim 5, wherein the buffer availability manager functionality is executed by a combination of hardware and processor executable instructions.

12. A system, comprising:

a plurality of buffers at a first device for writing data;

a plurality of register sets corresponding to the plurality of buffers at a second device executing a plurality of processes, where each register set includes a status indicator and a generation counter both used to determine if a buffer from among the plurality of buffers is available for writing; and

a buffer availability manager that sets the status indicator to indicate if a buffer is busy or not busy; and

the generation counter to a common default value during initialization, before the plurality of buffers are made available for writing to the plurality of processes;

wherein a process from among the plurality of processes, prior to writing to any buffer, (i) reads the plurality of register sets to find a buffer whose corresponding register set indicates that the buffer is not busy;

(ii) maintains a stored value for the generation counter of the register set corresponding to the buffer whose status indicator indicates that the buffer is not busy;

(iii) maintains a mechanism to determine if the buffer has previously been written by the process compares a current value of the generation counter to the stored value to determine if the generation counter has been updated since a last write operation performed by the process;

(iv) writes data to the buffer if the status indicator for the buffer indicates that the buffer is not busy and if the current value of the generation counter is different from the stored value of the generation counter and if the generation counter value has not changed since the last write operation, the process finds another buffer for writing data; and

wherein in response to the writing of data to the buffer, the buffer availability manager updates the status indicator to indicate that the buffer is busy; and

after the data in the buffer is processed, the buffer availability manager updates the status indicator to indicate that the buffer is not busy and updates the value of the generation counter to indicate that the buffer is again available for writing.

13. The system of claim 12, wherein data is written to the buffer if the status indicator for the buffer indicates that the buffer is not busy and if the process has not previously written data to the buffer, as determined by the mechanism.

14. The system of claim 12, wherein the plurality of buffers and the plurality of register sets are located at a same device.

15. The system of claim 12, wherein the buffer availability manager is executed by the first device.

16. The system of claim 12, wherein the buffer availability manager functionality is executed in hardware.

17. The system of claim 12, wherein the buffer availability manager functionality is executed by processor executable instructions.

18. The system of claim 12, wherein the buffer availability manager functionality is executed by a combination of hardware and processor executable instructions.