DC offset correction system for a receiver with baseband gain control

• US 7,899,431 B2
• Filed: 04/04/2005
• Issued: 03/01/2011
• Est. Priority Date: 04/04/2005
• Status: Active Grant

• Current Assignee: Apple Inc.
• Original Assignee: Freescale Semiconductor, Inc. (NXP Semiconductors NV)
• Inventors: Shah, Manish N., Rahman, Mahibur, Sobchak, Charles L.
• Primary Examiner(s): Nguyen; Duc
• Assistant Examiner(s): AKINYEMI, AJIBOLA A
• Application Number:
  US11/099,138
• Publication Number:
  US 20060222117A1
• Time in Patent Office: 2,157 Days
• Field of Search: 455/324
• US Class Current: 455/324
• CPC Class Codes: H03D 3/008 Compensating DC offsets
• CPC Class Codes: H03G 3/3068 Circuits generating control signals for both R.F. and I.F. stages
• CPC Class Codes: H04B 1/30 for homodyne or synchrodyne receivers demodulator circuits H03D1/22
• CPC Class Codes: H04L 25/061 providing hard decisions only; arrangements for tracking or suppressing unwanted low frequency components, e.g. removal of dc offset removal of dc offset in coupling arrangements H04L25/029, H04L25/0296

Abstract

A method and apparatus are provided for providing improved radio frequency (RF) receiver signal correction. For RF receiver circuitry (106) having receive path and a warmup period associated therewith and including at least one analog baseband gain control stage (218) having a gain associated therewith, the method includes the step of performing a DC correction calculation operation during the warmup period to derive a DC correction value having a first component and a second component for each of the at least one gain control stage (218). The DC correction calculation step includes the steps of performing a first closed loop correction (460) of a baseband path to derive the first component of the DC correction value and performing a second closed loop correction (462) of the receive path as a function of the (218) gain during the warmup period to derive the second component of the DC correction value. During operation after the warmup period (464 , 466), an open loop correction is performed for instantaneous DC correction as function of the PMA (218) gain and the DC correction value.

Claims

1. A method in radio frequency (RF) receiver circuitry having a warmup period and a receive path associated therewith and including a baseband analog gain control stage having a gain and a baseband path associated therewith, the method comprising the step of:

performing, within a feedback loop that includes a digital loop filter, a DC correction calculation operation during the warmup period to derive a DC correction value having a first component and a second component for the baseband analog gain control stage, wherein the step of performing a DC correction calculation operation during the warmup period comprises the steps of;

causing an input to the baseband analog gain control stage to be grounded;

performing a first closed loop correction of the baseband path to derive the first component of the DC correction value, wherein the first component of the DC correction value is a first DC offset value located at an output of the digital loop filter while the input is grounded;

causing the input of the baseband analog gain control stage to be connected to a mixer; and

performing a second closed loop correction of the receive path as a function of the gain during the warmup period to derive the second component of the DC correction value, wherein the second component of the DC correction value is a second DC offset value located at the output of the digital loop filter while the input is connected to the mixer.

2. The method of claim 1 further comprising the step of during operation of the RF receiver circuitry after the warmup period performing an open loop correction as a function of the gain and the DC correction value to perform instantaneous DC correction.

3. The method of claim 2 wherein the RF receiver circuitry further comprises a DC correction feedback path, and wherein the step of performing an open loop correction comprises the steps of:

placing the DC correction feedback path in a hold mode; and

in response to altering of the gain, performing an open loop correction as a function of the DC correction value.

4. The method of claim 1, wherein the RF receiver circuitry further comprises a Low Noise Amplifier (LNA) coupled to the baseband analog control stage and having a high gain state and a low gain state, and wherein the step of performing a first closed loop correction to derive a first component of the DC correction value further comprises the step of placing the LNA in the low gain state before the step of deriving the first component of the DC correction value.

5. The method of claim 1, wherein the RF receiver circuitry further comprises a Low Noise Amplifier (LNA) coupled to the baseband analog control stage and having a high gain state and a low gain state and the mixer coupled to the LNA, the mixer having an input and an output, and wherein the step of performing a second closed loop correction as a function of the gain during the warmup period to derive a second component of the DC correction value comprises the steps of:

setting the gain of the baseband analog gain stage to a high gain;

placing the LNA in the low gain state; and

storing the second DC offset value as the second component of the DC correction value.

6. The method of claim 5 wherein the step of storing the second DC offset value comprises the step of storing the second DC offset value to derive a stored DC correction value, wherein the stored DC correction value is a combination of the stored first component of the DC correction value and the second DC offset value which is the second component of the DC correction value.

7. The method of claim 6 further comprising the step of during operation of the RF receiver circuitry after the warmup period performing an open loop correction as a function of the gain and the stored DC correction value.

8. The method of claim 7 wherein the RF receiver circuitry further comprises a DC correction feedback path, and wherein the step of performing an open loop correction comprises the step of:

placing the DC correction feedback path in a hold mode;

enabling operation of the automatic gain control; and

performing an open loop correction as a function of the gain and the stored DC correction value.

9. The method of claim 8 wherein the step of performing an open loop correction comprises the step of performing an open loop correction as a function of the stored DC correction value in response to altering of the gain.

10. The method of claim 7 wherein the step of performing an open loop correction comprises the step of performing an open loop correction as a function of the gain, the stored DC correction value and a predetermined delay, wherein the predetermined delay corresponds to a time duration necessary to align altering of the gain to application of the DC correction value to the receive path.

11. The method of claim 1 wherein the RF receiver circuitry further comprises a pre-mixer RF lineup coupleable to the baseband analog gain stage and having a high gain state and a low gain state, the baseband analog gain stage having an input and an output, wherein the step of performing a second closed loop correction as a function of the gain during the warmup period to derive a second component of the DC correction value comprises the steps of:

coupling the pre-mixer RF lineup to the input of the at least one baseband analog gain stage;

setting the gain of the at least one baseband analog gain stage to a high gain;

setting the gain of the pre-mixer lineup to a low gain state; and

storing the second DC offset value as the second component of the DC correction value.

12. The method of claim 1 wherein the at least one baseband analog stage comprises at least one post mixer amplifier (PMA).

13. Radio frequency (RF) receiver circuitry having a warmup period associated therewith, the RF receiver circuitry comprising:

a baseband analog gain control stage having a gain associated therewith, the baseband analog gain control stage having a first input for receiving a control signal to control the gain thereof, the baseband analog gain control stage further having a second input and an output;

automatic gain control circuitry coupled to the baseband analog gain control stage for generating and providing the control signal thereto;

a lowband oscillator (LO);

a mixer having an input coupled to the LO and an output coupleable to the baseband analog gain control stage; and

DC offset correction circuitry that includes a digital loop filter, and that is coupled to the baseband analog gain control stage for receiving information therefrom and coupled to the baseband analog gain control stage and the mixer for control thereof during the warmup period, wherein during the warmup period the DC offset correction circuitry couples the second input of the baseband analog gain control stage to ground to perform a first closed loop correction to derive a first component of a DC correction value, wherein the first component of the DC correction value is a first DC offset value located at an output of the digital loop filter while the second input is grounded, the first component of the DC correction value being stored in the DC offset correction circuitry and couples the second input of the baseband analog gain control stage to the mixer to perform a second closed loop correction as a function of the gain to derive a second component of the DC correction value, wherein the second component of the DC correction value is a second DC offset value located at the output of the digital loop filter while the input is connected to the mixer.

14. The RF receiver circuitry of claim 13 wherein during operation after the warmup period, the second input of each of the at least one gain control stage is coupled to one of the at least one mixer to perform an instantaneous open loop correction as a function of the gain and the DC correction value, wherein the DC correction value consists of a combination of the first component and the second component thereof.

15. The RF receiver circuitry of claim 14 comprising two quadrature paths, an imaginary (I) path and a quadrature (Q) path, wherein each of the two quadrature paths comprise one of the at least one baseband analog gain control stage and one of the at least one mixer.

16. The RF receiver circuitry of claim 13 further comprising a Low Noise Amplifier (LNA) coupled to the at least one PMA and the automatic gain control circuitry, the LNA having a high gain state and a low gain state, and wherein the DC offset correction circuitry includes storage means for storing the DC correction value, wherein when performing the second closed loop correction during the warmup period to derive the second component of the DC correction value, the automatic gain control circuitry signals the at least one gain control stage to set the at least one gain control stage to a high gain and signals the LNA to place it in the low gain state and a closed loop DC offset value is stored in the storage means as the second component of the DC correction value, combining with the first component to derive the DC correction value.

17. The RF receiver circuitry of claim 13 wherein the at least one gain control stage comprises at least one post mixer amplifier (PMA) having a PMA gain.