Solder interconnection array with optimal mechanical integrity

• US 7,900,809 B2
• Filed: 06/26/2008
• Issued: 03/08/2011
• Est. Priority Date: 09/22/2004
• Status: Active Grant

• Current Assignee: GlobalFoundries, Inc.
• Original Assignee: International Business Machines Corporation
• Inventors: Daves, Glenn G., Pompeo, Frank L., Edwards, David L., Farooq, Mukta G.
• Primary Examiner(s): King; Roy
• Assistant Examiner(s): Aboagye; Michael
• Application Number:
  US12/146,798
• Publication Number:
  US 20080261350A1
• Time in Patent Office: 985 Days
• Field of Search: 228/215, 228/178, 228/180.1, 228/180.21, 228/180.22, 228/244
• US Class Current: 228/180.22
• CPC Class Codes: B23K 2101/40 Semiconductor devices
• CPC Class Codes: B23K 3/0638 for viscous material feeding, e.g. solder paste feeding B23K3/0623 takes precedence
• CPC Class Codes: H01L 2224/0401 Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/73204 the bump connector being embedded into the layer connector
• CPC Class Codes: H01L 2224/73253 Bump and layer connectors
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00011 Not relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01322 Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
• CPC Class Codes: H01L 2924/15311 being a ball array, e.g. BGA
• CPC Class Codes: H05K 2201/0209 Inorganic, non-metallic particles
• CPC Class Codes: H05K 2201/09909 Special local insulating pattern, e.g. as dam around component
• CPC Class Codes: H05K 2201/10234 Metallic balls
• CPC Class Codes: H05K 2201/10734 Ball grid array [BGA]; Bump grid array
• CPC Class Codes: H05K 2201/10977 Encapsulated connections
• CPC Class Codes: H05K 2201/2018 Presence of a frame in a printed circuit or printed circuit assembly
• CPC Class Codes: H05K 2201/2036 Permanent spacer or stand-off in a printed circuit or printed circuit assembly
• CPC Class Codes: H05K 3/301 : by means of a mounting structure H05K3/325 takes precedence
• CPC Class Codes: H05K 3/303 : Surface mounted components, e.g. affixing before soldering, aligning means, spacing means H05K3/32 takes precedence
• CPC Class Codes: H05K 3/305 : Affixing by adhesive
• CPC Class Codes: Y02P 70/50 : Manufacturing or production processes characterised by the final manufactured product
• CPC Class Codes: Y10T 29/49144 : by metal fusion

Abstract

A method for assembling, and the resultant electronic module, includes attaching a chip to a substrate using a first solder interconnection array, and attaching a board to the substrate using a second solder interconnection array, which may be a single-melt or a dual-melt solder array. The second solder interconnection array resides entirely within a space defined between the board and substrate. A creep resistant structure is provided within this space for maintaining the defined space and optimizing integrity of the second solder interconnection array. The creep resistant structure may include an underfill material, balls, brackets, frames, collars or combinations thereof. Wherein the creep resistant structure is an underfill material, it is crucial that the substrate be attached to the board before either entirely encapsulating the second interconnection array with underfill material, or partially encapsulating the second solder interconnection array at discrete locations with underfill material.

Claims

1. A method for assembling an electronic module comprising:

attaching a chip to a first surface of a substrate using a first solder interconnection array;

attaching an organic board to a second surface of said substrate using a second solder interconnection array thereby defining a space having a gap height between said organic board and said substrate, said second solder interconnection array residing entirely within said space;

providing an underfill material having a filler material present in an amount ranging from about 60% by weight per solution to about 64% by weight per solution, said filler material having a particle size ranging from about 32 microns to about 300 microns in diameter to fill said gap height;

depositing said underfill material within said space after said organic board has been attached to said substrate but before applying compressive forces to said electronic module, said underfill material contacting both said organic board and said substrate and selected solder joints of said second solder interconnection array; and

curing said underfill material to form a rigid matrix within said space to maintain and enhance integrity of said second solder interconnection array during application of said compressive forces.

2. The method of claim 1 further including the steps of cleaning surfaces of said organic board and said substrate within said space and heating said organic board followed by depositing said underfill material to increase wetting characteristics of said underfill material and enhance adhesion of said underfill material to said organic board and said substrate.

3. The method of claim 1 further including the step of providing at least one rigid metallic ball within said space to further maintain and enhance integrity of said second solder interconnection array.

4. The method of claim 1 further including the step of providing at least one mechanical support structure selected from the group consisting of a bracket, a frame and a collar within said space to further maintain and enhance integrity of said second solder interconnection array.

5. The method of claim 1 wherein said second solder interconnection array comprises a single melt solder interconnection array.

6. The method of claim 1 wherein said second solder interconnection array comprises a dual melt solder interconnection array.

7. The method of claim 1 wherein said underfill material entirely encapsulates said second solder interconnection array.

8. The method of claim 1 wherein said underfill material partially encapsulates said second solder interconnection array at discrete locations within said second solder interconnection array.

9. The method of claim 1 wherein said underfill material in its uncured state comprises a polymeric material having said particle size ranging from about 32 microns to about 300 microns in diameter.

10. The method of claim 1 wherein said underfill material in its uncured state has a density ranging from about 1.5 g/cc to about 2.0 g/cc, a viscosity at 25°

C. greater than about 5,000 cP, and a Thixotropic Index ranging from about 1.0 to about 2.0.

11. The method of claim 10 wherein said underfill material in its cured state has a glass transition temperature ranging from about 135°

C. to about 145°

C., and a dynamic tensile modulus strength at about 25°

C. greater than about 5 Gpa.

12. The method of claim 11 wherein said substrate comprises a ceramic substrate, said cured underfill material has a CTE below Tg of about 18 ppm/°

C. to about 21 ppm/°

C., and a CTE above the Tg of about 85 ppm/°

C.

13. The method of claim 11 wherein said substrate comprises a organic substrate, said cured underfill material has a CTE below Tg of about 12 ppm/°

C. to about 25 ppm/°

C., and a CTE above the Tg of about 70 ppm/°

C.