Plasma reactor control by translating desired values of M plasma parameters to values of N chamber parameters

• US 7,901,952 B2
• Filed: 12/11/2006
• Issued: 03/08/2011
• Est. Priority Date: 05/16/2003
• Status: Expired due to Fees

• Current Assignee: Applied Materials Incorporated
• Original Assignee: Applied Materials Incorporated
• Inventors: Gold, Ezra Robert, Hoffman, Daniel J.
• Primary Examiner(s): ALANKO, ANITA KAREN
• Application Number:
  US11/609,024
• Publication Number:
  US 20070080140A1
• Time in Patent Office: 1,548 Days
• Field of Search: 438/706, 438/710, 438/712, 438/714, 216/59, 216/61, 216/67
• US Class Current: 438/9
• CPC Class Codes: H01J 37/32174 Circuits specially adapted for controlling the RF discharge
• CPC Class Codes: H01J 37/32935 Monitoring and controlling tubes by information coming from the object and/or discharge
• CPC Class Codes: H01J 37/3299 Feedback systems

Abstract

The invention concerns a method of processing a wafer in a plasma reactor chamber by controlling plural chamber parameters in accordance with desired values of plural plasma parameters. The method includes concurrently translating a set of M desired values for M plasma parameters to a set of N values for respective N chamber parameters. The M plasma parameters are selected from a group including wafer voltage, ion density, etch rate, wafer current, etch selectivity, ion energy and ion mass. The N chamber parameters are selected from a group including source power, bias power, chamber pressure, inner magnet coil current, outer magnet coil current, inner zone gas flow rate, outer zone gas flow rate, inner zone gas composition, outer zone gas composition. The method further includes setting the N chamber parameters to the set of N values.

Claims

1. A method of controlling plural chamber parameters of a plasma reactor in accordance with desired values of plural plasma parameters, comprising:

concurrently translating a set of M desired values for M plasma parameters selected from the group consisting of wafer voltage, ion density, etch rate, wafer current, etch selectivity, ion energy and ion mass, to a set of N values for respective N chamber parameters selected from the group consisting of source power, bias power, chamber pressure, inner magnet coil current, outer magnet coil current, inner zone gas flow rate, outer zone gas flow rate, inner zone gas composition, outer zone gas composition, wherein M and N are integers and N is greater than two; and

realizing values of said M plasma parameters near said M desired values by setting said N chamber control parameters to said set of N values.

2. The method of claim 1 wherein the step of constructing surfaces defining simultaneous values of all of said chamber parameters comprises the following step carried out for each one of said plural plasma parameters:

combining the single variable functions dependent upon respective chamber parameters into a single composite function having plural variables of said chamber parameters.

3. The method of claim 2 wherein the step of constructing surfaces defining simultaneous values of all of said chamber parameters further comprises the following step carried out for each one of said plural plasma parameters:

setting the composite function equal to a succession of values of the respective plasma parameter.

4. The method of claim 3 wherein the step of constructing surfaces defining simultaneous values of all of said chamber parameters further comprises the following step carried out for each one of said plural plasma parameters:

for each one of said succession of values, solving for a surface defining a set of simultaneous values of source power, bias power and chamber pressure for which the respective plasma parameter has the one value.

5. The method of claim 1 wherein the step of sampling RF electrical parameters at an RF bias power input to a wafer support pedestal comprises:

sensing an input impedance, an input current and an input voltage to a transmission line coupled between a bias power impedance match circuit and an electrode within the wafer pedestal.

6. The method of claim 5 wherein the step of computing from each sample of said RF electrical parameters the values of plural plasma parameters is carried out in separate computations for each of said plasma parameters.

7. The method of claim 6 wherein the step of computing from each sample of said RF electrical parameters the values of plural plasma parameters comprises:

computing a junction admittance of a junction between said transmission line and the electrode within the wafer pedestal from said input impedance, input current and input voltage and from parameters of the transmission line.

8. The method of claim 7 wherein the step of computing from each sample of said RF electrical parameters the values of plural plasma parameters further comprises:

providing shunt electrical quantities of a shunt capacitance between the electrode and a ground plane;

providing load electrical quantities of a load capacitance between the electrode and a wafer on the pedestal.

9. The method of claim 8 wherein the step of computing from each sample of said RF electrical parameters the values of plural plasma parameters further comprises:

computing said etch rate, plasma ion density and wafer voltage from said junction admittance, said shunt electrical quantities, said load electrical quantities and a frequency of RF bias power applied to said electrode.

10. The method of claim 9 wherein said parameters of said transmission line comprise a length of said transmission line, a characteristic impedance of said transmission line and a complex loss factor of said transmission line.

11. The method of claim 10 wherein said shunt electrical quantities are computed from the size of an electrode-to-ground gap length, an area of said wafer, an electrode-to-ground dielectric constant and an electrode-to-ground conductive loss component.

12. The method of claim 11 wherein said load electrical quantities are computed from an electrode-to-wafer gap length, an area of the wafer, an electrode-to-wafer dielectric constant and an electrode-to-wafer conductive loss component.

13. The method of claim 12 wherein the step of computing said etch rate, plasma ion density and wafer voltage comprises:

first computing said wafer voltage and an imaginary part of a plasma admittance comprising a plasma susceptance, and computing said ion density and etch rate from said wafer voltage and said plasma susceptance.

14. The method of claim 1 wherein the step of translating further comprises:

for each one of said plural plasma parameters, fetching a relevant surface of constant value corresponding to the desired value of said one plasma parameter, and determining an intersection of the relevant surfaces which defines said N values of said chamber parameters.

15. The method of claim 14 wherein the number of said plural plasma parameters equals the number of said plural chamber parameters.

16. The method of claim 14 wherein the number of said plural plasma parameters is less than or greater than the number of said plural chamber parameters.